Inventor · disambiguated record
Jentje Leenstra
Also filed as: LEENSTRA JENTJE
40 granted patents·1 pending application·235 citations·filing 2014–2022
97Inventor score
Files withIBM41
Top patents by PatentIndex Score
41 records- 0197US9720696B2Independent mapping of threadsIBM·Filed 2014·Granted Aug 1, 2017·30 cites·6 claims
- 0296US9672043B2Processing of multiple instruction streams in a parallel slice processorIBM·Filed 2014·Granted Jun 6, 2017·29 cites·8 claims
- 0395US9690586B2Processing of multiple instruction streams in a parallel slice processorIBM·Filed 2014·Granted Jun 27, 2017·26 cites·4 claims
- 0495US9665372B2Parallel slice processor with dynamic instruction stream mappingIBM·Filed 2014·Granted May 30, 2017·25 cites·16 claims
- 0594US9690585B2Parallel slice processor with dynamic instruction stream mappingIBM·Filed 2014·Granted Jun 27, 2017·22 cites·9 claims
- 0693US10387686B2Hardware based isolation for secure execution of virtual machinesIBM·Filed 2017·Granted Aug 20, 2019·11 cites·24 claims
- 0793US9870229B2Independent mapping of threadsIBM·Filed 2015·Granted Jan 16, 2018·8 cites·9 claims
- 0893US9760375B2Register files for storing data operated on by instructions of multiple widthsIBM·Filed 2014·Granted Sep 12, 2017·23 cites·12 claims
- 0993US9740486B2Register files for storing data operated on by instructions of multiple widthsIBM·Filed 2014·Granted Aug 22, 2017·23 cites·13 claims
- 1092US9977678B2Reconfigurable parallel execution and load-store slice processorIBM·Filed 2015·Granted May 22, 2018·7 cites·10 claims
- 1190US9971602B2Reconfigurable processing method with modes controlling the partitioning of clusters and cache slicesIBM·Filed 2015·Granted May 15, 2018·6 cites·5 claims
- 1288US10296741B2Secure memory implementation for secure execution of virtual machinesIBM·Filed 2017·Granted May 21, 2019·4 cites·8 claims
- 1387US11646861B2Low-latency, high-availability and high-speed SerDes interface having multiple synchronization modesIBM·Filed 2021·Granted May 9, 2023·2 cites·25 claims
- 1486US10083039B2Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slicesIBM·Filed 2018·Granted Sep 25, 2018·3 cites·20 claims
- 1582US10983800B2Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slicesIBM·Filed 2018·Granted Apr 20, 2021·2 cites·20 claims
- 1682US10073697B2Handling unaligned load operations in a multi-slice computer processorIBM·Filed 2016·Granted Sep 11, 2018·2 cites·5 claims
- 1781US10474816B2Secure memory implementation for secure execution of Virtual MachinesIBM·Filed 2017·Granted Nov 12, 2019·2 cites·16 claims
- 1881US10423412B2Instructions to count contiguous register elements having a specific value in a selected locationIBM·Filed 2015·Granted Sep 24, 2019·2 cites·11 claims
- 1981US10157064B2Processing of multiple instruction streams in a parallel slice processorIBM·Filed 2017·Granted Dec 18, 2018·2 cites·15 claims
- 2080US10387150B2Instructions to count contiguous register elements having a specific value in a selected locationIBM·Filed 2015·Granted Aug 20, 2019·2 cites·20 claims
- 2179US10409598B2Handling unaligned load operations in a multi-slice computer processorIBM·Filed 2018·Granted Sep 10, 2019·1 cites·5 claims
- 2276US10831889B2Secure memory implementation for secure execution of virtual machinesIBM·Filed 2019·Granted Nov 10, 2020·1 cites·20 claims
- 2374US10067763B2Handling unaligned load operations in a multi-slice computer processorIBM·Filed 2015·Granted Sep 4, 2018·1 cites·9 claims
- 2473US11995445B2Assignment of microprocessor register tags at issue timeIBM·Filed 2022·Granted May 28, 2024·0 cites·25 claims
- 2571US10740104B2Tagging target branch predictors with context with index modification and late stop fetch on tag mismatchIBM·Filed 2018·Granted Aug 11, 2020·1 cites·17 claims
- 2668US10884742B2Handling unaligned load operations in a multi-slice computer processorIBM·Filed 2019·Granted Jan 5, 2021·0 cites·9 claims
- 2767US11144323B2Independent mapping of threadsIBM·Filed 2019·Granted Oct 12, 2021·0 cites·18 claims
- 2867US10831481B2Handling unaligned load operations in a multi-slice computer processorIBM·Filed 2019·Granted Nov 10, 2020·0 cites·14 claims
- 2966US11972259B2Instructions to count a number of contiguous register elements having specific values in a selected locationIBM·Filed 2019·Granted Apr 30, 2024·0 cites·17 claims
- 3066US11972260B2Instructions to count a number of contiguous register elements having specific values in a selected locationIBM·Filed 2019·Granted Apr 30, 2024·0 cites·9 claims
- 3164US11500642B2Assignment of microprocessor register tags at issue timeIBM·Filed 2020·Granted Nov 15, 2022·0 cites·20 claims
- 3264US10496406B2Handling unaligned load operations in a multi-slice computer processorIBM·Filed 2018·Granted Dec 3, 2019·0 cites·9 claims
- 3361US10545762B2Independent mapping of threadsIBM·Filed 2017·Granted Jan 28, 2020·0 cites·20 claims
- 3457US11907074B2Low-latency deserializer having fine granularity and defective-lane compensationIBM·Filed 2021·Granted Feb 20, 2024·0 cites·20 claims
- 3555US9846614B1ECC scrubbing in a multi-slice microprocessorIBM·Filed 2016·Granted Dec 19, 2017·0 cites·20 claims
- 3652US12061910B2Dispatching multiply and accumulate operations based on accumulator register index numberIBM·Filed 2019·Granted Aug 13, 2024·0 cites·17 claims
- 3752US10685106B2Protecting cognitive code and client data in a public cloud via deployment of data and executables into a stateless secure partitionIBM·Filed 2018·Granted Jun 16, 2020·0 cites·17 claims
- 3849US2024111933A1Automated verification of technology specific and technology independent logic models of a memory arrayIBM·Filed 2022·Application pending·0 cites
- 3948US11461474B2Process-based virtualization system for executing a secure application processIBM·Filed 2020·Granted Oct 4, 2022·0 cites·20 claims
- 4048US11068607B2Protecting cognitive code and client data in a public cloud via deployment of data and executables into a secure partition with persistent dataIBM·Filed 2018·Granted Jul 20, 2021·0 cites·19 claims
- 4147US10223196B2ECC scrubbing method in a multi-slice microprocessorIBM·Filed 2017·Granted Mar 5, 2019·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →