Inventor · disambiguated record
Jessie Lin
Also filed as: LIN JESSIE
2 granted patents·1 pending application·1 citations·filing 2019–2020
32Inventor score
Technology areasH10P
Files withUNIV NATIONAL CHIAO TUNG3
Top patents by PatentIndex Score
3 records- 0175US11271109B2Silicon metal-oxide-semiconductor field effect transistor (Si MOSFET) with a wide-bandgap III-V compound semiconductor group drain and method for fabricating the sameUNIV NATIONAL CHIAO TUNG·Filed 2020·Granted Mar 8, 2022·1 cites·18 claims
- 0253US11342179B2Semiconductor structure having a Si substrate heterointegrated with GaN and method for fabricating the sameUNIV NATIONAL CHIAO TUNG·Filed 2020·Granted May 24, 2022·0 cites·8 claims
- 0346US2020373153A1SEMICONDUCTOR STRUCTURE HAVING A Si SUBSTRATE HETEROINTEGRATED WITH GaN AND METHOD FOR FABRICATING THE SAMEUNIV NATIONAL CHIAO TUNG·Filed 2019·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →