Inventor · disambiguated record
Jerimy Nelson
Also filed as: NELSON JERIMY · NELSON JERIMY C
24 granted patents·8 pending applications·356 citations·filing 2002–2006
96Inventor score
Top patents by PatentIndex Score
32 records- 0190US6983434B1Differential via pair impedance adjustment toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jan 3, 2006·48 cites·21 claims
- 0287US6769102B2Verifying proximity of ground metal to signal traces in an integrated circuitHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jul 27, 2004·51 cites·37 claims
- 0383US6859915B1Signal line impedance verification toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Feb 22, 2005·30 cites·23 claims
- 0481US6971077B1Signal line impedance adjustment toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Nov 29, 2005·25 cites·21 claims
- 0581US6845492B1Signal via impedance adjustment toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jan 18, 2005·25 cites·21 claims
- 0674US6976233B1Signal via impedance verification toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Dec 13, 2005·19 cites·19 claims
- 0774US6889367B1Differential via pair impedance verification toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted May 3, 2005·17 cites·20 claims
- 0870US7075185B2Routing vias in a substrate from bypass capacitor padsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Jul 11, 2006·14 cites·15 claims
- 0970US6907589B2System and method for evaluating vias per pad in a package designHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jun 14, 2005·16 cites·20 claims
- 1069US6922822B2Verifying proximity of ground vias to signal vias in an integrated circuitHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jul 26, 2005·14 cites·30 claims
- 1167US7117464B2System and method for evaluating signal coupling between differential traces in a package designHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Oct 3, 2006·16 cites·30 claims
- 1267US6968522B1Differential line pair impedance verification toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Nov 22, 2005·12 cites·21 claims
- 1367US6938230B2System and method for evaluating signal trace discontinuities in a package designHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Aug 30, 2005·10 cites·11 claims
- 1466US7078812B2Routing differential signal lines in a substrateHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Jul 18, 2006·13 cites·29 claims
- 1565US6807657B2Inter-signal proximity verification in an integrated circuitHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Oct 19, 2004·11 cites·66 claims
- 1663US7069095B2System and method for populating a computer-aided design program's database with design parametersHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jun 27, 2006·9 cites·28 claims
- 1763US6983433B1Differential line pair impedance adjustment toolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jan 3, 2006·9 cites·20 claims
- 1858US7326860B2Routing vias in a substrate from bypass capacitor padsHEWLETT PACKARD DEVELOPMENT CO·Filed 2006·Granted Feb 5, 2008·1 cites·8 claims
- 1955US7143022B1System and method for integrating subcircuit models in an integrated power grid analysis environmentHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Nov 28, 2006·4 cites·42 claims
- 2054US7272806B2System and method for evaluating power and ground vias in a package designHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Sep 18, 2007·4 cites·13 claims
- 2152US7143389B2Systems and methods for generating node level bypass capacitor modelsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Nov 28, 2006·2 cites·26 claims
- 2252US7055124B2System and method for evaluating signal deviations in a package designHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted May 30, 2006·2 cites·20 claims
- 2351US7137088B2System and method for determining signal coupling coefficients for linesHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Nov 14, 2006·2 cites·18 claims
- 2447US2005223348A1System and method for evaluating signal trace discontinuities in a package designFRANK MARK D·Filed 2005·Application pending·0 cites
- 2546US7327583B2Routing power and ground vias in a substrateHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Feb 5, 2008·2 cites·16 claims
- 2644US2005197807A1System and method for maintaining homogeneity between a model in a computer-aided modeling system and corresponding model documentationFiled 2004·Application pending·0 cites
- 2744US2005251769A1System and method for determining signal coupling in a circuit designFRANK MARK D·Filed 2004·Application pending·0 cites
- 2840US2005249479A1System and method for determining signal coupling coefficients for viasFRANK MARK D·Filed 2004·Application pending·0 cites
- 2938US2005246670A1Differential via pair coupling verification toolBOIS KARL J·Filed 2004·Application pending·0 cites
- 3038US2005246672A1Differential trace pair coupling verification toolBOIS KARL J·Filed 2004·Application pending·0 cites
- 3138US2005246671A1Method and apparatus for determining worst case coupling within a differential pair groupBOIS KARL J·Filed 2004·Application pending·0 cites
- 3237US2004163056A1System and method for evaluating signal coupling between vias in a package designFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →