Inventor · disambiguated record
Jeng-Huang Wu
Also filed as: WU JENG-HUANG
15 granted patents·8 pending applications·153 citations·filing 1997–2019
92Inventor score
Top patents by PatentIndex Score
23 records- 0185US10644701B1Input and output circuit and self-biased circuit thereofFARADAY TECH CORP·Filed 2019·Granted May 5, 2020·9 cites·11 claims
- 0283US7764101B2Schmitt-trigger-based level detection circuitFARADAY TECH CORP·Filed 2009·Granted Jul 27, 2010·12 cites·6 claims
- 0383US7707521B2Layout architecture having high-performance and high-density designFARADAY TECH CORP·Filed 2006·Granted Apr 27, 2010·12 cites·14 claims
- 0475US6741130B2High-speed output transconductance amplifier capable of operating at different voltage levelsFiled 2002·Granted May 25, 2004·25 cites·8 claims
- 0573US7414458B2Power gating circuit of a signal processing systemFARADAY TECH CORP·Filed 2006·Granted Aug 19, 2008·10 cites·7 claims
- 0670US6160457AUniversal crystal-oscillator input/output circuit for application-specific integrated circuit with enhanced charge device mode electrostatic discharge protectionFARADAY TECH CORP·Filed 1999·Granted Dec 12, 2000·21 cites·14 claims
- 0769US6456115B2Clock gate buffering circuitFARADAY TECH CORP·Filed 2001·Granted Sep 24, 2002·16 cites·24 claims
- 0868US8169068B2IO cell with multiple IO ports and related techniques for layout area savingWU JENG-HUANG·Filed 2010·Granted May 1, 2012·4 cites·11 claims
- 0968US5974476AOn-chip input/output device having programmable I/O unit being configured based upon internal configuration circuitFARADAY TECH CORP·Filed 1997·Granted Oct 26, 1999·25 cites·18 claims
- 1063US6861874B1Input/output bufferFARADAY TECH CORP·Filed 2003·Granted Mar 1, 2005·11 cites·9 claims
- 1151US7465970B2Common pass gate layout of a D flip flopFARADAY TECH CORP·Filed 2006·Granted Dec 16, 2008·1 cites·9 claims
- 1250US7057468B2Crystal oscillator circuit with activation controlFARADAY TECH CORP·Filed 2004·Granted Jun 6, 2006·5 cites·14 claims
- 1344US2008178135A1Cells of integrated circuit and related technology and methodFARADAY TECH CORP·Filed 2007·Application pending·0 cites
- 1441US7046493B2Input/output buffer protection circuitFARADAY TECH CORP·Filed 2003·Granted May 16, 2006·1 cites·7 claims
- 1539US2020035670A1Electrostatic discharge protection apparatus for integrated circuitFARADAY TECH CORP·Filed 2018·Application pending·0 cites
- 1639US2009251185A1Data retention device for multiple power domainsFARADAY TECH CORP·Filed 2009·Application pending·0 cites
- 1738US6882188B1Input/output bufferFARADAY TECH CORP·Filed 2003·Granted Apr 19, 2005·1 cites·9 claims
- 1838US2008231336A1Scan flip-flop circuit with extra hold time marginFARADAY TECH CORP·Filed 2008·Application pending·0 cites
- 1937US2008303573A1Data-retention latch for sleep mode applicationFARADAY TECH CORP·Filed 2007·Application pending·0 cites
- 2033US2007272947A1Low Power Consuming Semiconductor DeviceWU JENG-HUANG·Filed 2006·Application pending·0 cites
- 2129US2002084825A1Small swing output buffer for reducing EMIFiled 2001·Application pending·0 cites
- 2228US10634706B2Core power detection circuit and associated input/output control systemFARADAY TECH CORP·Filed 2018·Granted Apr 28, 2020·0 cites·13 claims
- 2318US2016285256A1Integrated circuit and implementation method thereofWU JENG-HUANG·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →