Inventor · disambiguated record
Jeffry D. Yetter
Also filed as: YETTER JEFFRY · YETTER JEFFRY D
20 granted patents·458 citations·filing 1991–2009
96Inventor score
Top patents by PatentIndex Score
20 records- 0186US5329176ASelf-timed clocking system and method for self-timed dynamic logic circuitsHEWLETT PACKARD CO·Filed 1993·Granted Jul 12, 1994·48 cites·29 claims
- 0282US5434520AClocking systems and methods for pipelined self-timed dynamic logic circuitsHEWLETT PACKARD CO·Filed 1992·Granted Jul 18, 1995·96 cites·13 claims
- 0378US5289403ASelf-timed content addressable memory access mechanism with built-in margin test featureHEWLETT PACKARD CO·Filed 1991·Granted Feb 22, 1994·44 cites·8 claims
- 0476US7653108B2Apparatus and method of establishing optical communication channels between a steerable array of laser emitters and an array of optical detectorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Jan 26, 2010·11 cites·18 claims
- 0574US7269321B2System and method of configuring fiber optic communication channels between arrays of emitters and detectorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Sep 11, 2007·15 cites·11 claims
- 0672US5208490AFunctionally complete family of self-timed dynamic logic circuitsHEWLETT PACKARD CO·Filed 1991·Granted May 4, 1993·62 cites·27 claims
- 0770US9142938B2Apparatus and method of establishing optical communication channels between a steerable array of laser emitters and an array of optical detectorsMORRIS TERREL L·Filed 2009·Granted Sep 22, 2015·3 cites·14 claims
- 0868US5389835AVector logic method and dynamic mousetrap logic gate for a self-timed monotonic logic progressionHEWLETT PACKARD CO·Filed 1993·Granted Feb 14, 1995·21 cites·68 claims
- 0965US5765209AMethod and apparatus to eliminate redundant mapping in a TLB utilizing variable sized pagesHEWLETT PACKARD CO·Filed 1996·Granted Jun 9, 1998·51 cites·7 claims
- 1062US7719380B2AC coupling circuitHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted May 18, 2010·7 cites·25 claims
- 1162US7623783B2System and method of self-configuring optical communication channels between arrays of emitters and detectorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Nov 24, 2009·8 cites·22 claims
- 1260US7229218B2Apparatus and method of providing an optical connection between PC boards for optical communicationHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Jun 12, 2007·6 cites·30 claims
- 1356US5392423AUniversal pipeline latch for mousetrap logic circuitsHEWLETT PACKARD CO·Filed 1994·Granted Feb 21, 1995·31 cites·14 claims
- 1455US7816975B2Circuit and method for bias voltage generationHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Oct 19, 2010·3 cites·26 claims
- 1555US5900766ACoupling charge compensation device for VLSI circuitsHEWLETT PACKARD CO·Filed 1997·Granted May 4, 1999·13 cites·18 claims
- 1652US5299158AMemory device with multiple read portsHEWLETT PACKARD CO·Filed 1992·Granted Mar 29, 1994·15 cites·4 claims
- 1748US5317204AMitigating the adverse effects of charge sharing in dynamic logic circuitsHEWLETT PACKARD CO·Filed 1992·Granted May 31, 1994·9 cites·34 claims
- 1844US7623793B2System and method of configuring fiber optic communication channels between arrays of emitters and detectorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Nov 24, 2009·0 cites·21 claims
- 1935US5689228AParallel magnitude comparison using manchester carry chainsHEWLETT PACKARD CO·Filed 1996·Granted Nov 18, 1997·8 cites·20 claims
- 2034US5875121ARegister selection system and methodHEWLETT PACKARD CO·Filed 1996·Granted Feb 23, 1999·7 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →