Inventor · disambiguated record
Jiankang Bu
Also filed as: BU JIANKANG
30 granted patents·10 pending applications·151 citations·filing 2006–2025
95Inventor score
Top patents by PatentIndex Score
40 records- 0195US11881525B2Semiconductor device with bi-directional double-base trench power switchesIDEAL POWER INC·Filed 2022·Granted Jan 23, 2024·6 cites·20 claims
- 0293US7447064B1System and method for providing a CMOS compatible single poly EEPROM with an NMOS program transistorNAT SEMICONDUCTOR CORP·Filed 2006·Granted Nov 4, 2008·31 cites·20 claims
- 0391US12148819B2System and method for bi-directional trench power switchesIDEAL POWER INC·Filed 2023·Granted Nov 19, 2024·1 cites·17 claims
- 0490US7483310B1System and method for providing high endurance low cost CMOS compatible EEPROM devicesNAT SEMICONDUCTOR CORP·Filed 2006·Granted Jan 27, 2009·19 cites·23 claims
- 0588US7514940B1System and method for determining effective channel dimensions of metal oxide semiconductor devicesNAT SEMICONDUCTOR CORP·Filed 2006·Granted Apr 7, 2009·16 cites·20 claims
- 0684US8004032B1System and method for providing low voltage high density multi-bit storage flash memoryNAT SEMICONDUCTOR CORP·Filed 2006·Granted Aug 23, 2011·10 cites·22 claims
- 0783US7773423B1Low power, CMOS compatible non-volatile memory cell and related method and memory arrayNAT SEMICONDUCTOR CORP·Filed 2007·Granted Aug 10, 2010·14 cites·20 claims
- 0882US7804714B1System and method for providing an EPROM with different gate oxide thicknessesNAT SEMICONDUCTOR CORP·Filed 2007·Granted Sep 28, 2010·9 cites·23 claims
- 0979US7532496B1System and method for providing a low voltage low power EPROM based on gate oxide breakdownNAT SEMICONDUCTOR CORP·Filed 2007·Granted May 12, 2009·12 cites·24 claims
- 1077US7471572B1System and method for enhancing erase performance in a CMOS compatible EEPROM deviceNAT SEMICONDUCTOR CORP·Filed 2006·Granted Dec 30, 2008·10 cites·20 claims
- 1170US7646638B1Non-volatile memory cell that inhibits over-erasure and related method and memory arrayNAT SEMICONDUCTOR CORP·Filed 2007·Granted Jan 12, 2010·7 cites·20 claims
- 1270US2025380436A1Methods of manufacturing bipolar junction devicesIDEAL POWER INC·Filed 2025·Application pending·0 cites
- 1368US7586792B1System and method for providing drain avalanche hot carrier programming for non-volatile memory applicationsNAT SEMICONDUCTOR CORP·Filed 2006·Granted Sep 8, 2009·7 cites·20 claims
- 1467US7512499B1System and method for determining substrate doping density in metal oxide semiconductor devicesNAT SEMICONDUCTOR CORP·Filed 2006·Granted Mar 31, 2009·3 cites·21 claims
- 1565US7910420B1System and method for improving CMOS compatible non volatile memory retention reliabilityNAT SEMICONDUCTOR CORP·Filed 2006·Granted Mar 22, 2011·3 cites·21 claims
- 1663US12506476B2Methods and systems of operating a double-sided double-base bipolar junction transistorIDEAL POWER INC·Filed 2024·Granted Dec 23, 2025·0 cites·19 claims
- 1762US12388442B2Unidirectional hybrid switch circuitIDEAL POWER INC·Filed 2023·Granted Aug 12, 2025·0 cites·18 claims
- 1860US8241975B2System and method for providing low voltage high density multi-bit storage flash memoryBU JIANKANG·Filed 2011·Granted Aug 14, 2012·1 cites·18 claims
- 1960US2025373245A1Unidirectional switch circuitIDEAL POWER INC·Filed 2025·Application pending·0 cites
- 2059US2025364989A1Bipolar junction devices, and methods and switches using sameIDEAL POWER INC·Filed 2025·Application pending·0 cites
- 2156US8274824B1High-performance CMOS-compatible non-volatile memory cell and related methodBU JIANKANG·Filed 2009·Granted Sep 25, 2012·1 cites·17 claims
- 2256US8013400B1Method and system for scaling channel lengthNAT SEMICONDUCTOR CORP·Filed 2008·Granted Sep 6, 2011·1 cites·20 claims
- 2356US2025112634A1Methods and systems of operating a double-sided double-base bipolar junction transistorIDEAL POWER INC·Filed 2024·Application pending·0 cites
- 2455US2024194736A1Thin bidirectional bipolar junction transistor devices from bonded wide and thick wafersIDEAL POWER INC·Filed 2023·Application pending·0 cites
- 2553US12506475B2Hybrid switch circuit with bidirectional double-base bipolar junction transistorsIDEAL POWER INC·Filed 2023·Granted Dec 23, 2025·0 cites·20 claims
- 2653US2024396546A1Methods and systems of operating a double-sided double-base bipolar junction transistorIDEAL POWER INC·Filed 2024·Application pending·0 cites
- 2752US2023386987A1Double-sided cooling package for double-sided, bi-directional junction transistorIDEAL POWER INC·Filed 2023·Application pending·0 cites
- 2850US2024154029A1Methods and systems of operating a pnp bi-directional double-base bipolar junction transistorIDEAL POWER INC·Filed 2023·Application pending·0 cites
- 2948US2025392305A1Bipolar junction device, and methods and switch assemblies using sameIDEAL POWER INC·Filed 2025·Application pending·0 cites
- 3047US7777271B1System and method for providing low cost high endurance low voltage electrically erasable programmable read only memoryNAT SEMICONDUCTOR CORP·Filed 2006·Granted Aug 17, 2010·0 cites·20 claims
- 3146US7855146B1Photo-focus modulation method for forming transistor gates and related transistor devicesNAT SEMICONDUCTOR CORP·Filed 2007·Granted Dec 21, 2010·0 cites·20 claims
- 3244US8198708B2System and method for improving CMOS compatible non volatile memory retention reliabilityBU JIANKANG·Filed 2011·Granted Jun 12, 2012·0 cites·20 claims
- 3344US8114738B2System and method for providing low cost high endurance low voltage electrically erasable programmable read only memoryBU JIANKANG·Filed 2010·Granted Feb 14, 2012·0 cites·20 claims
- 3444US7790491B1Method for forming non-volatile memory cells and related apparatus and systemNAT SEMICONDUCTOR CORP·Filed 2008·Granted Sep 7, 2010·0 cites·20 claims
- 3543US7838203B1System and method for providing process compliant layout optimization using optical proximity correction to improve CMOS compatible non volatile memory retention reliabilityNAT SEMICONDUCTOR CORP·Filed 2006·Granted Nov 23, 2010·0 cites·20 claims
- 3643US2013277711A1Oscillation Free Fast-Recovery DiodeINT RECTIFIER CORP·Filed 2013·Application pending·0 cites
- 3741US9972681B2High voltage vertical semiconductor device with multiple pillars in a racetrack arrangementPOWER INTEGRATIONS INC·Filed 2017·Granted May 15, 2018·0 cites·21 claims
- 3837US8502296B1Non-volatile memory cell with asymmetrical split gate and related system and methodLABONTE ANDRE P·Filed 2008·Granted Aug 6, 2013·0 cites·20 claims
- 3936US8097923B2Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuitsBUDRI THANAS·Filed 2010·Granted Jan 17, 2012·0 cites·20 claims
- 4035US7781289B1Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuitsNAT SEMICONDUCTOR CORP·Filed 2007·Granted Aug 24, 2010·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →