Inventor · disambiguated record
Jinquan Dai
Also filed as: DAI JINQUAN · DAI JINQUAN JASON
18 granted patents·5 pending applications·83 citations·filing 2003–2010
93Inventor score
Technology areasG06F
Top patents by PatentIndex Score
23 records- 0175US7890943B2Code optimization based on loop structuresINTEL CORP·Filed 2007·Granted Feb 15, 2011·7 cites·11 claims
- 0273US7412568B2Method for thread cachingINTEL CORP·Filed 2006·Granted Aug 12, 2008·6 cites·13 claims
- 0370US8745606B2Critical section ordering for multiple trace applicationsGUO XIAOFENG·Filed 2007·Granted Jun 3, 2014·5 cites·19 claims
- 0468US8543992B2Method and apparatus for partitioning programs to balance memory latencyJIANG XIAODAN·Filed 2005·Granted Sep 24, 2013·8 cites·15 claims
- 0568US7606974B2Automatic caching generation in network applicationsINTEL CORP·Filed 2004·Granted Oct 20, 2009·15 cites·21 claims
- 0667US8612957B2Scheduling multithreaded programming instructions based on dependency graphGUO XIAOFENG·Filed 2006·Granted Dec 17, 2013·4 cites·18 claims
- 0767US7752611B2Speculative code motion for memory latency hidingINTEL CORP·Filed 2005·Granted Jul 6, 2010·4 cites·25 claims
- 0866US8453131B2Method and apparatus for ordering code based on critical sectionsLI LONG·Filed 2005·Granted May 28, 2013·4 cites·11 claims
- 0966US8438552B2Apparatus and method for automatically parallelizing network applications through pipelining transformationDAI JINQUAN·Filed 2010·Granted May 7, 2013·3 cites·33 claims
- 1065US8037466B2Method and apparatus for merging critical sectionsINTEL CORP·Filed 2006·Granted Oct 11, 2011·3 cites·13 claims
- 1164US7793276B2Apparatus and method for automatically parallelizing network applications through pipelining transformationINTEL CORP·Filed 2003·Granted Sep 7, 2010·10 cites·20 claims
- 1256US8769513B2Latency hiding of traces using block coloringGUO XIAOFENG·Filed 2005·Granted Jul 1, 2014·1 cites·28 claims
- 1354US7774769B2Transmitting trace-specific information in a transformed applicationINTEL CORP·Filed 2005·Granted Aug 10, 2010·1 cites·13 claims
- 1453US7457936B2Memory access instruction vectorizationINTEL CORP·Filed 2003·Granted Nov 25, 2008·4 cites·29 claims
- 1553US7392513B2Methods and apparatus for merging critical sectionsINTEL CORP·Filed 2004·Granted Jun 24, 2008·4 cites·25 claims
- 1650US7634767B2Method and system for assigning register class through efficient dataflow analysisINTEL CORP·Filed 2004·Granted Dec 15, 2009·2 cites·15 claims
- 1750US7581214B2Live set transmission in pipelining applicationsINTEL CORP·Filed 2004·Granted Aug 25, 2009·2 cites·22 claims
- 1843US7620787B2Optimizing memory accesses for network applications using indexed register filesINTEL CORP·Filed 2006·Granted Nov 17, 2009·0 cites·17 claims
- 1943US2008040711A1Methods and apparatus to optimize computer instructionsGUO XIAOFENG·Filed 2006·Application pending·0 cites
- 2041US2005108695A1Apparatus and method for an automatic thread-partition compilerFiled 2003·Application pending·0 cites
- 2141US2005125786A1Compiler with two phase bi-directional scheduling framework for pipelined processorsFiled 2003·Application pending·0 cites
- 2240US2006225049A1Trace based signal scheduling and compensation code generationLV ZHIYUAN·Filed 2005·Application pending·0 cites
- 2335US2008282237A1Method and Apparatus For Generating Execution Equivalence InformationDAI JINQUAN·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →