Inventor · disambiguated record
Ji-Cheng Lin
Also filed as: LIN JI-CHENG
11 granted patents·1 pending application·24 citations·filing 2001–2020
85Inventor score
Files withPOWERTECH TECHNOLOGY INC6IND TECH RES INST4INSTR TECHNOLOGY RES CT1INTEGRATED CRYSTAL TECHNOLOGY1
Top patents by PatentIndex Score
12 records- 0183US10276510B2Manufacturing method of package structure having conductive shieldPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Apr 30, 2019·4 cites·20 claims
- 0281US9825010B2Stacked chip package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Granted Nov 21, 2017·4 cites·18 claims
- 0373US10607860B2Package structure and chip structurePOWERTECH TECHNOLOGY INC·Filed 2017·Granted Mar 31, 2020·2 cites·11 claims
- 0467US7531900B2Package structure for electronic deviceIND TECH RES INST·Filed 2006·Granted May 12, 2009·3 cites·13 claims
- 0566US7691676B1Mold array process for semiconductor packagesPOWERTECH TECHNOLOGY INC·Filed 2008·Granted Apr 6, 2010·3 cites·11 claims
- 0663US7754599B2Structure for reducing stress for vias and fabricating method thereofIND TECH RES INST·Filed 2009·Granted Jul 13, 2010·2 cites·11 claims
- 0757US10950557B2Stacked chip package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2020·Granted Mar 16, 2021·0 cites·13 claims
- 0853US6541834B1Silicon pressure micro-sensing device and the fabrication processINTEGRATED CRYSTAL TECHNOLOGY·Filed 2001·Granted Apr 1, 2003·6 cites·2 claims
- 0946US7545039B2Structure for reducing stress for vias and fabricating method thereofIND TECH RES INST·Filed 2006·Granted Jun 9, 2009·0 cites·5 claims
- 1046US2017287870A1Stacked chip package structure and manufacturing method thereofPOWERTECH TECHNOLOGY INC·Filed 2017·Application pending·0 cites
- 1145US7378746B2Composite bumpIND TECH RES INST·Filed 2006·Granted May 27, 2008·0 cites·17 claims
- 1243US7732928B2Structure for protecting electronic packaging contacts from stressINSTR TECHNOLOGY RES CT·Filed 2006·Granted Jun 8, 2010·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →