Inventor · disambiguated record
Jiung Wu
Also filed as: WU JIUNG
7 granted patents·2 pending applications·8 citations·filing 2012–2023
74Inventor score
Top patents by PatentIndex Score
9 records- 0187US9786580B2Self-alignment for redistribution layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Oct 10, 2017·8 cites·17 claims
- 0262US11004741B2Profile of through via protrusion in 3DIC interconnectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 11, 2021·0 cites·20 claims
- 0360US12394684B2Die stacking structure, semiconductor package and formation method of the die stacking structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 19, 2025·0 cites·20 claims
- 0458US10566237B2Profile of through via protrusion in 3DIC interconnectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Feb 18, 2020·0 cites·20 claims
- 0556US2025038073A1Package structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 0655US10163705B2Profile of through via protrusion in 3DIC interconnectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Dec 25, 2018·0 cites·20 claims
- 0753US10074595B2Self-alignment for redistribution layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Sep 11, 2018·0 cites·20 claims
- 0852US2023360993A1Die stacking structure, semiconductor package and manufacturing method of the die stacking structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Application pending·0 cites
- 0941US8691706B2Reducing substrate warpage in semiconductor processingYU CHEN-HUA·Filed 2012·Granted Apr 8, 2014·0 cites·16 claims
Join the waitlist — get patent alerts
Get an alert when Jiung Wu files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →