Inventor · disambiguated record
Jiaxin Yao
Also filed as: YAO JIAXIN
2 granted patents·7 pending applications·0 citations·filing 2019–2024
21Inventor score
Files withINST OF MICROELECTRONICS CAS9
Top patents by PatentIndex Score
9 records- 0156US2025359013A1Three-dimensional stacked dynamic random-access memory and method for manufacturing the sameINST OF MICROELECTRONICS CAS·Filed 2023·Application pending·0 cites
- 0255US2025031417A1Semiconductor device and method for manufacturing the sameINST OF MICROELECTRONICS CAS·Filed 2023·Application pending·0 cites
- 0353US2024379794A13ds fet and method of manufacturing the sameINST OF MICROELECTRONICS CAS·Filed 2023·Application pending·0 cites
- 0453US2025311184A1Hybrid integrated sram memory cell structure and method of manufacturing hybrid integrated sram memory cell structureINST OF MICROELECTRONICS CAS·Filed 2024·Application pending·0 cites
- 0552US2025133773A1Stacked nanosheet gate-all-around device with air spacer and method of manufacturing stacked nanosheet gate-all-around device with air spacerINST OF MICROELECTRONICS CAS·Filed 2024·Application pending·0 cites
- 0652US2025133785A1Stacked nanosheet gate-all-around device with air spacer and method of manufacturing stacked nanosheet gate-all-around device with air spacerINST OF MICROELECTRONICS CAS·Filed 2024·Application pending·0 cites
- 0744US2025069653A1Computing-in-memory circuit and sram memory deviceINST OF MICROELECTRONICS CAS·Filed 2024·Application pending·0 cites
- 0841US11594608B2Method for forming gate-all-around nanowire deviceINST OF MICROELECTRONICS CAS·Filed 2019·Granted Feb 28, 2023·0 cites·2 claims
- 0939US11411091B2Structure of stacked gate-all-around nano-sheet CMOS device and method for manufacturing the sameINST OF MICROELECTRONICS CAS·Filed 2019·Granted Aug 9, 2022·0 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →