Inventor · disambiguated record
Jose Renau Ardevol
Also filed as: ARDEVOL JOSE RENAU
1 granted patent·1 pending application·4 citations·filing 2012–2012
24Inventor score
Technology areasG06F
Top patents by PatentIndex Score
2 records- 0172US9003163B2Combining a remote TLB lookup and a subsequent cache miss into a single coherence operationKOKA PRANAY·Filed 2012·Granted Apr 7, 2015·4 cites·20 claims
- 0228US2014325156A1Long Latency Tolerant Decoupled Memory Hierarchy for Simpler and Energy Efficient DesignsUNIV CALIFORNIA·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →