Inventor · disambiguated record
Jose A. Baiocchi Paredes
Also filed as: BAIOCCHI PAREDES JOSE · BAIOCCHI PAREDES JOSE A
4 granted patents·1 pending application·4 citations·filing 2015–2017
64Inventor score
Files withINTEL CORP5
Top patents by PatentIndex Score
5 records- 0181US10802567B2Performing local power gating in a processorINTEL CORP·Filed 2017·Granted Oct 13, 2020·2 cites·20 claims
- 0271US9772674B2Performing local power gating in a processorINTEL CORP·Filed 2015·Granted Sep 26, 2017·1 cites·13 claims
- 0361US10474442B2Methods and apparatus to perform region formation for a dynamic binary translation processorINTEL CORP·Filed 2017·Granted Nov 12, 2019·1 cites·30 claims
- 0457US2017371397A1Performing Local Power Gating In A ProcessorINTEL CORP·Filed 2017·Application pending·0 cites
- 0537US10789056B2Technologies for scalable translation caching for binary translation systemsINTEL CORP·Filed 2016·Granted Sep 29, 2020·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →