Inventor · disambiguated record
Joan Rey Villarba Buot
Also filed as: BUOT JOAN R V · BUOT JOAN REY V · BUOT JOAN REY VILLARBA
23 granted patents·58 pending applications·36 citations·filing 2004–2024
90Inventor score
Top patents by PatentIndex Score
81 records- 0174US2024421105A1Inkjet printing dedicated test pinsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0272US2024363514A1Package comprising a package substrate that includes an encapsulated portion with interconnection portion blocksQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0371US7262492B2Semiconducting device that includes wirebondsINTEL CORP·Filed 2004·Granted Aug 28, 2007·25 cites·22 claims
- 0469US8093717B2Microstrip spacer for stacked chip scale packages, methods of making same, methods of operating same, and systems containing sameBUOT JOAN REY V·Filed 2005·Granted Jan 10, 2012·7 cites·10 claims
- 0569US2024363513A1Package comprising a package substrate that includes an encapsulated portion with interconnection portion blocksQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0662US8317107B2Chip-spacer integrated radio frequency ID tags, methods of making same, and systems containing sameBUOT JOAN REY V·Filed 2005·Granted Nov 27, 2012·4 cites·15 claims
- 0761US12500146B2Substrate(s) for an integrated circuit (IC) package employing a metal core for improved electrical shielding and structural strength, and related IC packages and fabrication methodsQUALCOMM INC·Filed 2023·Granted Dec 16, 2025·0 cites·23 claims
- 0861US12381174B2Integrated circuit (IC) packages employing wire bond channel over package substrate, and related fabrication methodsQUALCOMM INC·Filed 2022·Granted Aug 5, 2025·0 cites·23 claims
- 0961US2025293136A1Buried bump structureQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1061US2025357308A1Deep trench capacitor (dtc) pad on solder resist (sr) layerQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1161US2025132262A1Device with side-by-side integrated circuit devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1261US2025379129A1Conductive structure and interconnects for electrically connecting a substrate and an interposerQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1360US2025273626A1Package comprising integrated devices and an interconnection deviceQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1460US2025253217A1Package comprising substrates with post interconnectsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1560US2025293197A1Package comprising integrated devices and wire bonds coupled to integrated devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1660US2025323136A1Integrated circuit (ic) package including two substrates and vertical interconnects coupling the two substrates, the vertical interconnects comprising a metal ball and metal pin combination to address an increased distance between substratesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1760US2025294685A1Substrate with buried glass coreQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1860US2025300056A1Integrated device with conductive pillar structure for die interconnectionQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1960US2022320016A1Inkjet printing dedicated test pinsQUALCOMM INC·Filed 2021·Application pending·0 cites
- 2060US2025273522A1Package comprising a substrate including a via interconnect with a partial concentric planar cross sectionQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2160US2025183178A1Bridge die in substrate core layerQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2259US2025293130A1Die package with entangled vertical interconnects coupled to a routing substrate for reduced routing substrate layers, and related integrated circuit (ic) packages and fabrication methodsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2359US2025239518A1PACKAGE SUBSTRATE WITH EMBEDDED CAPACITOR PACKAGE HAVING REDISTRIBUTION LAYER(S) (RDL(s)) FOR ALIGNING CAPACITOR TERMINALS CONNECTIONS TO SEMICONDUCTOR DIE IN AN INTEGRATED CIRCUIT (IC) PACKAGE, AND RELATED FABRICATION METHODSQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2459US2025246531A1Integrated circuit (ic) package with die interconnects terminating at multiple metallization layers in a substrate to reduce spacing requirements between die interconnectsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2559US2025098066A1Package comprising a substrate with an interconnect blockQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2659US2025273597A1Embedded scaffold stiffener in substrateQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2759US2025273612A1Package comprising a substrate including an inter substrate interconnect structure comprising an inner interconnectQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2858US2025273596A1Integrated circuit (ic) packages employing stiffener structure with integrated cavity(ies) to enclose an electrical component(s), and related fabrication methodsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2958US2025062246A1Structure for delamination mitigation in a semiconductor deviceQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3058US2025096091A1Package comprising a substrate with via interconnect with vertical wallsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3158US2025062235A1Package substrate with metallization layer(s) that includes an additional metal pad layer to facilitate reduced via size for reduced bump pitch, and related integrated circuit (ic) packages and fabrication methodsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3258US2025218966A1Substrate having asymmetric metallization structures disposed on opposite sides of a central coreQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3358US2025192010A1Interposer substrate including offset core layerQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3457US11804645B2Multi-sided antenna module employing antennas on multiple sides of a package substrate for enhanced antenna coverage, and related fabrication methodsQUALCOMM INC·Filed 2021·Granted Oct 31, 2023·0 cites·32 claims
- 3557US2025140700A1Substrate including conductive stud on pad structureQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3657US2025191989A1Package comprising a substrate with cavity and an integrated device with a step back sideQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3757US2025079281A1Package substrate employing film substrate and an outer pre-impregnated (ppg) substrate(s) to support high density bump and wire bond connections, and related hybrid integrated circuit (ic) packages and fabrication methodsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3857US2025132292A1Device with side-by-side integrated circuit devicesQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3956US12230552B2Recess structure for padless stack viaQUALCOMM INC·Filed 2021·Granted Feb 18, 2025·0 cites·30 claims
- 4056US11296022B2Package and substrate comprising interconnects with semi-circular planar shape and/or trapezoid planar shapeQUALCOMM INC·Filed 2020·Granted Apr 5, 2022·0 cites·29 claims
- 4156US2024274516A1Interposer with solder resist postsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4256US2025096111A1Package comprising a substrate with a passive component blockQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4356US2024321752A1Package substrate comprising embedded integrated deviceQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4456US2024332146A1Integrated circuit (ic) package employing metal posts thermally coupling a die to an interposer substrate for dissipating thermal energy of the die, and related fabrication methodsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4555US11832391B2Terminal connection routing and method the sameQUALCOMM INC·Filed 2020·Granted Nov 28, 2023·0 cites·28 claims
- 4655US11791320B2Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methodsQUALCOMM INC·Filed 2021·Granted Oct 17, 2023·0 cites·31 claims
- 4755US11764076B2Semi-embedded trace structure with partially buried tracesQUALCOMM INC·Filed 2020·Granted Sep 19, 2023·0 cites·20 claims
- 4855US11581251B2Package comprising inter-substrate gradient interconnect structureQUALCOMM INC·Filed 2020·Granted Feb 14, 2023·0 cites·25 claims
- 4955US2025070086A1Package-on-package device including redistribution dieQUALCOMM INC·Filed 2023·Application pending·0 cites
- 5055US2024194545A1Metal pocket fanout packageQUALCOMM INC·Filed 2022·Application pending·0 cites
Showing the top 50 of 81 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →