Inventor · disambiguated record
John Stuart Freeman
Also filed as: FREEMAN JOHN · FREEMAN JOHN S · FREEMAN JOHN STUART
16 granted patents·2 pending applications·82 citations·filing 2006–2025
91Inventor score
Top patents by PatentIndex Score
18 records- 0190US9166597B1Integrated circuit processing via offload processorALTERA CORP·Filed 2014·Granted Oct 20, 2015·11 cites·20 claims
- 0289US9117022B1Hierarchical arbitrationCHIU GORDON RAYMOND·Filed 2012·Granted Aug 25, 2015·15 cites·22 claims
- 0387US10599404B1M/A for compiling parallel program having barrier synchronization for programmable hardwareNETO DAVID·Filed 2012·Granted Mar 24, 2020·17 cites·27 claims
- 0483US9922150B1Method and apparatus for satisfying operating conditions in a system design using an electronic design automation toolALTERA CORP·Filed 2014·Granted Mar 20, 2018·8 cites·21 claims
- 0582US2025371235A1Methods and Apparatus for Profile-Guided Optimization of Integrated CircuitsALTERA CORP·Filed 2025·Application pending·0 cites
- 0678US10120969B1Global variable optimization for integrated circuit applicationsALTERA CORP·Filed 2016·Granted Nov 6, 2018·3 cites·20 claims
- 0776US9703696B1Guided memory buffer allocationALTERA CORP·Filed 2013·Granted Jul 11, 2017·5 cites·18 claims
- 0876US8201114B1Method and apparatus for performing look up table unpacking and repacking for resynthesisMANOHARARAJAH VALAVAN·Filed 2009·Granted Jun 12, 2012·7 cites·30 claims
- 0972US12393756B2Methods and apparatus for profile-guided optimization of integrated circuitsINTEL CORP·Filed 2023·Granted Aug 19, 2025·0 cites·61 claims
- 1072US9424043B1Forward-flow selectionALTERA CORP·Filed 2012·Granted Aug 23, 2016·3 cites·20 claims
- 1169US11675948B2Methods and apparatus for profile-guided optimization of integrated circuitsINTEL CORP·Filed 2017·Granted Jun 13, 2023·1 cites·20 claims
- 1268US9547738B1Invariant code optimization in high-level FPGA synthesisALTERA CORP·Filed 2014·Granted Jan 17, 2017·2 cites·17 claims
- 1367US7720243B2Acoustic enhancement for behind the ear communication devicesSYNYGIS LLC·Filed 2006·Granted May 18, 2010·8 cites·20 claims
- 1464US10437743B1Interface circuitry for parallel computing architecture circuitsALTERA CORP·Filed 2016·Granted Oct 8, 2019·1 cites·16 claims
- 1559US9135087B1Workgroup handling in pipelined circuitsALTERA CORP·Filed 2012·Granted Sep 15, 2015·1 cites·19 claims
- 1657US2022197613A1Clock gating and clock scaling based on runtime application task graph informationINTEL CORP·Filed 2022·Application pending·0 cites
- 1753US12493454B2Incremental just-in-time (JIT) performance refinement for programmable logic device offloadALTERA CORP·Filed 2022·Granted Dec 9, 2025·0 cites·19 claims
- 1843US10997339B2Method and apparatus for supporting automatic testbench parallelism and serial equivalence checking during verificationINTEL CORP·Filed 2017·Granted May 4, 2021·0 cites·25 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →