Inventor · disambiguated record
John Fu
Also filed as: FU JOHN · FU JOHN W · FU JOHN W C · FU JOHN WAI CHEONG
16 granted patents·797 citations·filing 1983–2004
95Inventor score
Top patents by PatentIndex Score
16 records- 0196US6948094B2Method of correcting a machine check errorINTEL CORP·Filed 2001·Granted Sep 20, 2005·296 cites·20 claims
- 0279US6067656AMethod and apparatus for detecting soft errors in content addressable memory arraysINTEL CORP·Filed 1997·Granted May 23, 2000·85 cites·28 claims
- 0378US7376877B2Combined tag and data ECC for enhanced soft error recovery from cache tag errorsINTEL CORP·Filed 2004·Granted May 20, 2008·22 cites·24 claims
- 0477US6772383B1Combined tag and data ECC for enhanced soft error recovery from cache tag errorsINTEL CORP·Filed 1999·Granted Aug 3, 2004·68 cites·27 claims
- 0572US7089460B2System and method for memory leak detectionMICROSOFT CORP·Filed 2003·Granted Aug 8, 2006·19 cites·54 claims
- 0672US4488939AVapor corrosion rate monitoring method and apparatusWESTINGHOUSE ELECTRIC CORP·Filed 1983·Granted Dec 18, 1984·26 cites·7 claims
- 0771US6292906B1Method and apparatus for detecting and compensating for certain snoop errors in a system with multiple agents having cache memoriesINTEL CORP·Filed 1997·Granted Sep 18, 2001·62 cites·20 claims
- 0871US6272597B1Dual-ported, pipelined, two level cache systemINTEL CORP·Filed 1998·Granted Aug 7, 2001·60 cites·29 claims
- 0970US6542966B1Method and apparatus for managing temporal and non-temporal data in a single cache structureINTEL CORP·Filed 1998·Granted Apr 1, 2003·54 cites·23 claims
- 1062US6725339B2Processing ordered data requests to a memoryINTEL CORP·Filed 2002·Granted Apr 20, 2004·7 cites·28 claims
- 1158US6226763B1Method and apparatus for performing cache accessesINTEL CORP·Filed 1998·Granted May 1, 2001·33 cites·11 claims
- 1255USD430220SSign for automobile windowFU JOHN WAI YUEN·Filed 2000·Granted Aug 29, 2000·11 cites·1 claims
- 1347US6381678B2Processing ordered data requests to a memoryINTEL CORP·Filed 1998·Granted Apr 30, 2002·17 cites·16 claims
- 1443US6427191B1High performance fully dual-ported, pipelined cache designINTEL CORP·Filed 1998·Granted Jul 30, 2002·15 cites·23 claims
- 1540US6453427B2Method and apparatus for handling data errors in a computer systemINTEL CORP·Filed 1998·Granted Sep 17, 2002·13 cites·20 claims
- 1638US6134636AMethod and apparatus for storing data in a memory arrayINTEL CORP·Filed 1998·Granted Oct 17, 2000·9 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →