Inventor · disambiguated record
Jody W. Gambles
Also filed as: GAMBLES JODY · GAMBLES JODY W
6 granted patents·1 pending application·147 citations·filing 1999–2007
85Inventor score
Top patents by PatentIndex Score
7 records- 0186US6326809B1Apparatus for and method of eliminating single event upsets in combinational logicUNIV NEW MEXICO·Filed 1999·Granted Dec 4, 2001·74 cites·31 claims
- 0283US6583470B1Radiation tolerant back biased CMOS VLSISTC UNM·Filed 2000·Granted Jun 24, 2003·40 cites·15 claims
- 0378US6779158B2Digital logic optimization using selection operatorsSTC UNM·Filed 2002·Granted Aug 17, 2004·19 cites·23 claims
- 0465US7489538B2Radiation tolerant combinational logic cellUNIV IDAHO·Filed 2006·Granted Feb 10, 2009·6 cites·32 claims
- 0563US7576562B1Diagnosable structured logic arrayUS NAT AERONAUTICS AND SPACE A·Filed 2007·Granted Aug 18, 2009·4 cites·23 claims
- 0657US6779156B2Digital circuits using universal logic gatesSTC UNM·Filed 2002·Granted Aug 17, 2004·4 cites·21 claims
- 0726US2009029353A1Molecular detectorMAKI WUSI C·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →