Inventor · disambiguated record
Jonathan W. Greene
Also filed as: GREENE JONATHAN · GREENE JONATHAN W
59 granted patents·2 pending applications·2,247 citations·filing 1988–2022
99Inventor score
Top patents by PatentIndex Score
61 records- 0199US7495473B2Non-volatile look-up table for an FPGAACTEL CORP·Filed 2007·Granted Feb 24, 2009·270 cites·5 claims
- 0298US4910417AUniversal logic module comprising multiplexersACTEL CORP·Filed 1989·Granted Mar 20, 1990·168 cites·5 claims
- 0398US4873459AProgrammable interconnect architectureACTEL CORP·Filed 1988·Granted Oct 10, 1989·508 cites·12 claims
- 0497US8415650B2Front to back resistive random access memory cellsGREENE JONATHAN·Filed 2010·Granted Apr 9, 2013·56 cites·12 claims
- 0597US8269203B2Resistive RAM devices for programmable logic devicesGREENE JONATHAN·Filed 2010·Granted Sep 18, 2012·28 cites·16 claims
- 0697US7430137B2Non-volatile memory cells in a field programmable gate arrayACTEL CORP·Filed 2007·Granted Sep 30, 2008·47 cites·7 claims
- 0797US5440245ALogic module with configurable combinational and sequential blocksACTEL CORP·Filed 1993·Granted Aug 8, 1995·111 cites·11 claims
- 0897US5198705ALogic module with configurable combinational and sequential blocksACTEL CORP·Filed 1991·Granted Mar 30, 1993·119 cites·5 claims
- 0997US5132571AProgrammable interconnect architecture having interconnects disposed above function modulesACTEL CORP·Filed 1990·Granted Jul 21, 1992·261 cites·1 claims
- 1095US7129748B1Non-volatile look-up table for an FPGAACTEL CORP·Filed 2004·Granted Oct 31, 2006·43 cites·6 claims
- 1195US5191241AProgrammable interconnect architectureACTEL CORP·Filed 1992·Granted Mar 2, 1993·195 cites·20 claims
- 1294US11023559B2Apparatus and method for combining analog neural net with FPGA routing in a monolithic integrated circuitMICROSEMI SOC CORP·Filed 2019·Granted Jun 1, 2021·8 cites·12 claims
- 1394US9147836B2Layouts for resistive RAM cellsMICROSEMI SOC CORP·Filed 2015·Granted Sep 29, 2015·13 cites·8 claims
- 1494US7301821B1Volatile data storage in a non-volatile memory cell arrayACTEL CORP·Filed 2005·Granted Nov 27, 2007·26 cites·27 claims
- 1594US5055718ALogic module with configurable combinational and sequential blocksACTEL CORP·Filed 1990·Granted Oct 8, 1991·90 cites·22 claims
- 1693US7321237B2Non-volatile look-up table for an FPGAACTEL CORP·Filed 2006·Granted Jan 22, 2008·16 cites·16 claims
- 1791US8981328B2Back to back resistive random access memory cellsMICROSEMI SOC CORP·Filed 2014·Granted Mar 17, 2015·5 cites·7 claims
- 1891US8269204B2Back to back resistive random access memory cellsGREENE JONATHAN·Filed 2010·Granted Sep 18, 2012·18 cites·17 claims
- 1991US5017813AInput/output module with latchesACTEL CORP·Filed 1990·Granted May 21, 1991·63 cites·3 claims
- 2090US7924052B1Field programmable gate array architecture having Clos network-based input interconnectACTEL CORP·Filed 2009·Granted Apr 12, 2011·19 cites·21 claims
- 2189US9991894B2Resistive random access memory cellsMICROSEMI SOC CORP·Filed 2015·Granted Jun 5, 2018·4 cites·12 claims
- 2287US7772879B1Logic module including versatile adder for FPGAACTEL CORP·Filed 2008·Granted Aug 10, 2010·15 cites·10 claims
- 2384US10256822B2Front to back resistive random access memory cellsMICROSEMI SOC CORP·Filed 2018·Granted Apr 9, 2019·2 cites·23 claims
- 2484US8723151B2Front to back resistive random access memory cellsMICROSEMI SOC CORP·Filed 2013·Granted May 13, 2014·3 cites·6 claims
- 2584US7932745B2Inverting flip-flop for use in field programmable gate arraysACTEL CORP·Filed 2010·Granted Apr 26, 2011·6 cites·15 claims
- 2682US7932744B1Staggered I/O groups for integrated circuitsACTEL CORP·Filed 2008·Granted Apr 26, 2011·10 cites·28 claims
- 2781US7492182B2Non-volatile look-up table for an FPGAACTEL CORP·Filed 2007·Granted Feb 17, 2009·7 cites·5 claims
- 2881US5781033ALogic module with configurable combinational and sequential blocksACTEL CORP·Filed 1996·Granted Jul 14, 1998·29 cites·13 claims
- 2980US10855286B2Front to back resistive random-access memory cellsMICROSEMI SOC CORP·Filed 2019·Granted Dec 1, 2020·2 cites·20 claims
- 3079US10361702B2FPGA math block with dedicated connectionsMICROSEMI SOC CORP·Filed 2018·Granted Jul 23, 2019·2 cites·9 claims
- 3178US7884640B2PLD providing soft wakeup logicACTEL CORP·Filed 2008·Granted Feb 8, 2011·9 cites·27 claims
- 3276US5095228ACircuits for preventing breakdown of low-voltage device inputs during high voltage antifuse programmingACTEL CORP·Filed 1991·Granted Mar 10, 1992·29 cites·4 claims
- 3375US7816946B1Inverting flip-flop for use in field programmable gate arraysACTEL CORP·Filed 2009·Granted Oct 19, 2010·6 cites·4 claims
- 3475US7581117B1Method for secure delivery of configuration data for a programmable logic deviceACTEL CORP·Filed 2005·Granted Aug 25, 2009·10 cites·10 claims
- 3573US10971216B2SRAM configuration cell for low-power field programmable gate arraysMICROSEMI SOC CORP·Filed 2018·Granted Apr 6, 2021·2 cites·7 claims
- 3673US10523208B2Efficient lookup table modules for user-programmable integrated circuitsMICROSEMI SOC CORP·Filed 2018·Granted Dec 31, 2019·2 cites·8 claims
- 3772US7538576B2Non-volatile look-up table for an FPGAACTEL CORP·Filed 2007·Granted May 26, 2009·4 cites·6 claims
- 3872US7443198B1Non-volatile look-up table for an FPGAACTAL CORP·Filed 2007·Granted Oct 28, 2008·8 cites·20 claims
- 3971US10936286B2FPGA logic cell with improved support for countersMICROSEMI SOC CORP·Filed 2019·Granted Mar 2, 2021·2 cites·5 claims
- 4071US10714180B2Hybrid configuration memory cellMICROSEMI SOC CORP·Filed 2019·Granted Jul 14, 2020·2 cites·22 claims
- 4170US9000807B2On-chip probe circuit for detecting faults in an FPGAMICROSEMI SOC CORP·Filed 2013·Granted Apr 7, 2015·3 cites·9 claims
- 4268US9103880B2On-chip probe circuit for detecting faults in an FPGAMICROSEMI SOC CORP·Filed 2013·Granted Aug 11, 2015·2 cites·19 claims
- 4366US9514804B2Multi-state configuration RAM cellMICROSEMI SOC CORP·Filed 2015·Granted Dec 6, 2016·2 cites·8 claims
- 4466US7919977B2Circuits and methods for testing FPGA routing switchesACTEL CORP·Filed 2010·Granted Apr 5, 2011·2 cites·12 claims
- 4566US7463061B1Apparatus and method for reducing leakage of unused buffers in an integrated circuitACTEL CORP·Filed 2005·Granted Dec 9, 2008·5 cites·9 claims
- 4665US9147025B2Method for efficient FPGA packingMICROSEMI SOC CORP·Filed 2014·Granted Sep 29, 2015·2 cites·5 claims
- 4762US11544349B2Method for combining analog neural net with FPGA routing in a monolithic integrated circuitMICROSEMI SOC CORP·Filed 2021·Granted Jan 3, 2023·0 cites·2 claims
- 4858US8085064B2Logic module including versatile adder for FPGAFENG WENYI·Filed 2010·Granted Dec 27, 2011·1 cites·8 claims
- 4957US7804321B2Circuits and methods for testing FPGA routing switchesACTEL CORP·Filed 2008·Granted Sep 28, 2010·2 cites·9 claims
- 5057US5610534ALogic module for a programmable logic deviceACTEL CORP·Filed 1995·Granted Mar 11, 1997·10 cites·28 claims
Showing the top 50 of 61 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →