Inventor · disambiguated record
Jonathan T. Hsieh
Also filed as: HSIEH JONATHAN · HSIEH JONATHAN T · HSIEH JONATHAN TING
39 granted patents·2 pending applications·72 citations·filing 2008–2024
96Inventor score
Technology areasG06F
Top patents by PatentIndex Score
41 records- 0194US9400752B1Store forwarding cacheIBM·Filed 2016·Granted Jul 26, 2016·8 cites·1 claims
- 0293US8521992B2Predicting and avoiding operand-store-compare hazards in out-of-order microprocessorsALEXANDER GREGORY W·Filed 2010·Granted Aug 27, 2013·21 cites·24 claims
- 0385US9471504B2Store forwarding cacheIBM·Filed 2016·Granted Oct 18, 2016·3 cites·1 claims
- 0484US9262320B2Tracking transactional execution footprintALEXANDER KHARY J·Filed 2012·Granted Feb 16, 2016·8 cites·16 claims
- 0581US10929142B2Making precise operand-store-compare predictions to avoid false dependenciesIBM·Filed 2019·Granted Feb 23, 2021·3 cites·19 claims
- 0681US9483409B2Store forwarding cacheIBM·Filed 2015·Granted Nov 1, 2016·2 cites·20 claims
- 0779US9430235B2Predicting and avoiding operand-store-compare hazards in out-of-order microprocessorsIBM·Filed 2013·Granted Aug 30, 2016·4 cites·20 claims
- 0879US8468325B2Predicting and avoiding operand-store-compare hazards in out-of-order microprocessorsALEXANDER GREGORY W·Filed 2009·Granted Jun 18, 2013·9 cites·19 claims
- 0975US9697132B2Store forwarding cacheIBM·Filed 2016·Granted Jul 4, 2017·1 cites·1 claims
- 1071US9164911B2Atomic execution over accesses to multiple memory locations in a multiprocessor systemIBM·Filed 2014·Granted Oct 20, 2015·2 cites·20 claims
- 1170US9218288B2Monitoring a value in storage without repeated storage accessALEXANDER KHARY J·Filed 2012·Granted Dec 22, 2015·2 cites·14 claims
- 1268US9223687B2Determining the logical address of a transaction abortALEXANDER KHARY J·Filed 2012·Granted Dec 29, 2015·2 cites·20 claims
- 1364US8954678B2Automatic pattern-based operand prefetchingAVERBOUCH ILIA·Filed 2012·Granted Feb 10, 2015·3 cites·20 claims
- 1464US8799583B2Atomic execution over accesses to multiple memory locations in a multiprocessor systemFARRELL MARK S·Filed 2010·Granted Aug 5, 2014·1 cites·17 claims
- 1563US10296348B2Delayed allocation of an out-of-order queue entry and based on determining that the entry is unavailable, enable deadlock avoidance involving reserving one or more entries in the queue, and disabling deadlock avoidance based on expiration of a predetermined amount of timeIBM·Filed 2015·Granted May 21, 2019·1 cites·20 claims
- 1661US12099845B2Load reissuing using an alternate issue queueIBM·Filed 2022·Granted Sep 24, 2024·0 cites·17 claims
- 1759US9612963B2Store forwarding cacheIBM·Filed 2016·Granted Apr 4, 2017·0 cites·20 claims
- 1858US2025370755A1Physical register deallocation in a processing systemIBM·Filed 2024·Application pending·0 cites
- 1957US9569370B2Storing a system-absolute address (SAA) in a first level translation look-aside buffer (TLB)IBM·Filed 2016·Granted Feb 14, 2017·0 cites·1 claims
- 2057US8112174B2Processor, method and computer program product for fast selective invalidation of translation lookaside bufferHSIEH JONATHAN T·Filed 2008·Granted Feb 7, 2012·2 cites·19 claims
- 2156US9940264B2Load and store ordering for a strongly ordered simultaneous multithreading coreIBM·Filed 2014·Granted Apr 10, 2018·0 cites·12 claims
- 2256US9460023B2Storing a system-absolute address (SAA) in a first level translation look-aside buffer (TLB)IBM·Filed 2016·Granted Oct 4, 2016·0 cites·1 claims
- 2355US9292453B2Storing a system-absolute address (SAA) in a first level translation look-aside buffer (TLB)IBM·Filed 2013·Granted Mar 22, 2016·0 cites·10 claims
- 2453US9990290B2Cache coherency verification using ordered listsIBM·Filed 2017·Granted Jun 5, 2018·0 cites·20 claims
- 2553US9665280B2Cache coherency verification using ordered listsIBM·Filed 2014·Granted May 30, 2017·0 cites·14 claims
- 2652US9274957B2Monitoring a value in storage without repeated storage accessIBM·Filed 2013·Granted Mar 1, 2016·0 cites·8 claims
- 2751US11080199B2Determining logical address of an oldest memory access requestIBM·Filed 2019·Granted Aug 3, 2021·0 cites·17 claims
- 2851US11074184B2Maintaining data order between buffersIBM·Filed 2019·Granted Jul 27, 2021·0 cites·17 claims
- 2950US11205005B2Identifying microarchitectural security vulnerabilities using simulation comparison with modified secret dataIBM·Filed 2019·Granted Dec 21, 2021·0 cites·20 claims
- 3050US9886397B2Load and store ordering for a strongly ordered simultaneous multithreading coreIBM·Filed 2015·Granted Feb 6, 2018·0 cites·4 claims
- 3149US11144321B2Store hit multiple load side register for preventing a subsequent store memory violationIBM·Filed 2019·Granted Oct 12, 2021·0 cites·14 claims
- 3249US10963259B2Accounting for multiple pipeline depths in processor instrumentationIBM·Filed 2019·Granted Mar 30, 2021·0 cites·20 claims
- 3349US9665281B2Cache coherency verification using ordered listsIBM·Filed 2015·Granted May 30, 2017·0 cites·8 claims
- 3448US11243774B2Dynamic selection of OSC hazard avoidance mechanismIBM·Filed 2019·Granted Feb 8, 2022·0 cites·17 claims
- 3548US10802830B2Imprecise register dependency trackingIBM·Filed 2019·Granted Oct 13, 2020·0 cites·18 claims
- 3647US9015419B2Avoiding aborts due to associativity conflicts in a transactional environmentALEXANDER KHARY J·Filed 2012·Granted Apr 21, 2015·0 cites·20 claims
- 3746US11144367B2Write power optimization for hardware employing pipe-based duplicate register filesIBM·Filed 2019·Granted Oct 12, 2021·0 cites·5 claims
- 3844US11150902B2Processor pipeline management during cache misses using next-best ticket identifier for sleep and wakeupIBM·Filed 2019·Granted Oct 19, 2021·0 cites·11 claims
- 3944US2014082252A1Combined Two-Level Cache DirectoryALEXANDER KHARY J·Filed 2012·Application pending·0 cites
- 4042US9250913B2Collision-based alternate hashingALEXANDER KHARY J·Filed 2012·Granted Feb 2, 2016·0 cites·4 claims
- 4142US9152566B2Prefetch address translation using prefetch buffer based on availability of address translation logicALEXANDER KHARY J·Filed 2012·Granted Oct 6, 2015·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →