Inventor · disambiguated record
Joachim Keinert
Also filed as: KEINERT JOACHIM
61 granted patents·2 pending applications·558 citations·filing 1984–2023
98Inventor score
Top patents by PatentIndex Score
63 records- 0196US9501603B2Integrated circuit design changes using through-silicon viasIBM·Filed 2014·Granted Nov 22, 2016·40 cites·10 claims
- 0296US6909147B2Multi-height FinFETSIBM·Filed 2003·Granted Jun 21, 2005·171 cites·35 claims
- 0394US7315994B2Method and device for automated layer generation for double-gate FinFET designsIBM·Filed 2004·Granted Jan 1, 2008·199 cites·8 claims
- 0491US11699263B2Apparatus, method and computer program for rendering a visual sceneFRAUNHOFER GES FORSCHUNG·Filed 2020·Granted Jul 11, 2023·5 cites·19 claims
- 0590US12033339B2Localization of elements in the spaceFRAUNHOFER GES FORSCHUNG·Filed 2021·Granted Jul 9, 2024·2 cites·13 claims
- 0688US8811811B1Camera system and method for generating high-quality HDR images or videosFRAUNHOFER GES FORSCHUNG·Filed 2013·Granted Aug 19, 2014·14 cites·20 claims
- 0788US8495547B2Providing secondary power pins in integrated circuit designKEINERT JOACHIM·Filed 2010·Granted Jul 23, 2013·15 cites·11 claims
- 0887US8418110B2Using port obscurity factors to improve routingKEINERT JOACHIM·Filed 2010·Granted Apr 9, 2013·12 cites·10 claims
- 0986US9928329B2Layout of large block synthesis blocks in integrated circuitsIBM·Filed 2016·Granted Mar 27, 2018·3 cites·20 claims
- 1086US9910948B2Layout of large block synthesis blocks in integrated circuitsIBM·Filed 2016·Granted Mar 6, 2018·3 cites·16 claims
- 1184US10803624B2Apparatus for providing calibration data, camera system and method for obtaining calibration dataFRAUNHOFER GES FORSCHUNG·Filed 2019·Granted Oct 13, 2020·5 cites·18 claims
- 1284US10242140B2Layout of large block synthesis blocks in integrated circuitsIBM·Filed 2017·Granted Mar 26, 2019·2 cites·18 claims
- 1384US10235487B2Layout of large block synthesis blocks in integrated circuitsIBM·Filed 2017·Granted Mar 19, 2019·2 cites·9 claims
- 1483US7971171B2Method and system for electromigration analysis on signal wiringIBM·Filed 2008·Granted Jun 28, 2011·13 cites·22 claims
- 1580US10223491B2Integrated circuit design changes using through-silicon viasIBM·Filed 2017·Granted Mar 5, 2019·2 cites·15 claims
- 1679US11546614B1Encoder and decoder for encoding and decoding imagesFRAUNHOFER GES FORSCHUNG·Filed 2021·Granted Jan 3, 2023·2 cites·36 claims
- 1779US9569580B2Integrated circuit design changes using through-silicon viasIBM·Filed 2015·Granted Feb 14, 2017·2 cites·4 claims
- 1877US10956644B2Integrated circuit design changes using through-silicon viasIBM·Filed 2019·Granted Mar 23, 2021·1 cites·20 claims
- 1975US10223489B2Placement clustering-based white space reservationIBM·Filed 2016·Granted Mar 5, 2019·2 cites·20 claims
- 2073US11006133B2Image compression techniqueFRAUNHOFER GES FORSCHUNG·Filed 2019·Granted May 11, 2021·2 cites·26 claims
- 2173US10721470B2Compression of a raw imageFRAUNHOFER GES FORSCHUNG·Filed 2018·Granted Jul 21, 2020·2 cites·9 claims
- 2271US8429584B2Method, electronic design automation tool, computer program product, and data processing program for creating a layout for design representation of an electronic circuit and corresponding port for an electronic circuitKEINERT JOACHIM·Filed 2010·Granted Apr 23, 2013·3 cites·15 claims
- 2369US9684759B2De-coupling capacitance placementIBM·Filed 2015·Granted Jun 20, 2017·1 cites·13 claims
- 2469US7962877B2Port assignment in hierarchical designs by abstracting macro logicIBM·Filed 2008·Granted Jun 14, 2011·4 cites·20 claims
- 2568US9679099B2De-coupling capacitance placementIBM·Filed 2015·Granted Jun 13, 2017·1 cites·20 claims
- 2667US12149744B2Apparatus and method for encoding and decoding a sequence of pictures using a buffered transform signal approximationFRAUNHOFER GES FORSCHUNG·Filed 2023·Granted Nov 19, 2024·0 cites·32 claims
- 2767US12132934B2Operation method of electronic device for encoding and decoding a sequence of pictures using a buffered transform signal approximationFRAUNHOFER GES FORSCHUNG·Filed 2023·Granted Oct 29, 2024·0 cites·32 claims
- 2867US10534884B2Layout of large block synthesis blocks in integrated circuitsIBM·Filed 2019·Granted Jan 14, 2020·0 cites·20 claims
- 2967US8762919B2Circuit macro placement using macro aspect ratio based on portsKEINERT JOACHIM·Filed 2010·Granted Jun 24, 2014·2 cites·18 claims
- 3065US10417366B2Layout of large block synthesis blocks in integrated circuitsIBM·Filed 2018·Granted Sep 17, 2019·0 cites·20 claims
- 3165US10366191B2Layout of large block synthesis blocks in integrated circuitsIBM·Filed 2018·Granted Jul 30, 2019·0 cites·11 claims
- 3264US11954874B2Localization of elements in the spaceFRAUNHOFER GES FORSCHUNG·Filed 2021·Granted Apr 9, 2024·0 cites·35 claims
- 3363US9412682B2Through-silicon via access device for integrated circuitsIBM·Filed 2014·Granted Aug 9, 2016·1 cites·11 claims
- 3462US11736731B2Encoding and decoding a sequence of picturesFRAUNHOFER GES FORSCHUNG·Filed 2022·Granted Aug 22, 2023·0 cites·32 claims
- 3561US8122400B2Logic difference synthesisHOPKINS JEREMY T·Filed 2009·Granted Feb 21, 2012·3 cites·19 claims
- 3660US8495551B2Shaping ports in integrated circuit designKEINERT JOACHIM·Filed 2010·Granted Jul 23, 2013·1 cites·12 claims
- 3759US10579773B2Layouting of interconnect lines in integrated circuitsIBM·Filed 2018·Granted Mar 3, 2020·0 cites·4 claims
- 3858US11438617B2Transform coefficients encoder and decoderFRAUNHOFER GES FORSCHUNG·Filed 2020·Granted Sep 6, 2022·0 cites·16 claims
- 3958US10417377B2Layouting of interconnect lines in integrated circuitsIBM·Filed 2018·Granted Sep 17, 2019·0 cites·12 claims
- 4057US11457232B2Bit-plane encoder and decoderFRAUNHOFER GES FORSCHUNG·Filed 2020·Granted Sep 27, 2022·0 cites·16 claims
- 4156US10169519B2Area sharing between multiple large block synthesis (LBS) blocksIBM·Filed 2018·Granted Jan 1, 2019·0 cites·17 claims
- 4256US9761304B1Write-bitline control in multicore SRAM arraysIBM·Filed 2016·Granted Sep 12, 2017·1 cites·17 claims
- 4356US8276105B2Automatic positioning of gate array circuits in an integrated circuit designKEINERT JOACHIM·Filed 2009·Granted Sep 25, 2012·1 cites·17 claims
- 4455US10743014B2Bit-plane codingFRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG EV·Filed 2018·Granted Aug 11, 2020·0 cites·14 claims
- 4554US10013521B2Layouting of interconnect lines in integrated circuitsIBM·Filed 2015·Granted Jul 3, 2018·0 cites·6 claims
- 4653US8984314B2Charge recycling between power domains of integrated circuitsIBM·Filed 2013·Granted Mar 17, 2015·0 cites·6 claims
- 4752US9946830B2Area sharing between multiple large block synthesis (LBS) blocksIBM·Filed 2016·Granted Apr 17, 2018·0 cites·20 claims
- 4849US8972758B2Charge recycling between power domains of integrated circuitsBAROWSKI HARRY·Filed 2011·Granted Mar 3, 2015·0 cites·12 claims
- 4947US9633928B2Through-silicon via access device for integrated circuitsIBM·Filed 2015·Granted Apr 25, 2017·0 cites·6 claims
- 5047US6237128B1Method and apparatus for enabling parallel layout checking of designing VLSI-chipsIBM·Filed 1997·Granted May 22, 2001·22 cites·16 claims
Showing the top 50 of 63 patent records by PatentIndex Score.
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