Inventor · disambiguated record
Joseph P. Kerzman
Also filed as: KERZMAN JOSEPH P · KERZMAN JOSEPH PETER
19 granted patents·1 pending application·1,118 citations·filing 1994–2019
96Inventor score
Top patents by PatentIndex Score
20 records- 0195US6889370B1Method and apparatus for selecting and aligning cells using a placement toolUNISYS CORP·Filed 2000·Granted May 3, 2005·121 cites·35 claims
- 0292US6684376B1Method and apparatus for selecting components within a circuit design databaseUNISYS CORP·Filed 1997·Granted Jan 27, 2004·205 cites·28 claims
- 0390US10153775B1Phase interpolatorMICRON TECHNOLOGY INC·Filed 2017·Granted Dec 11, 2018·10 cites·29 claims
- 0485US10840924B2Phase interpolatorMICRON TECHNOLOGY INC·Filed 2019·Granted Nov 17, 2020·2 cites·18 claims
- 0583US6546532B1Method and apparatus for traversing and placing cells using a placement toolUNISYS CORP·Filed 2000·Granted Apr 8, 2003·40 cites·29 claims
- 0681US6029205ASystem architecture for improved message passing and process synchronization between concurrently executing processesUNISYS CORP·Filed 1997·Granted Feb 22, 2000·121 cites·48 claims
- 0776US5696693AMethod for placing logic functions and cells in a logic design using floor planning by analogyUNISYS CORP·Filed 1995·Granted Dec 9, 1997·89 cites·39 claims
- 0874US6516456B1Method and apparatus for selectively viewing nets within a database editor toolUNISYS CORP·Filed 1997·Granted Feb 4, 2003·77 cites·49 claims
- 0973US10425090B2Phase interpolatorMICRON TECHNOLOGY INC·Filed 2018·Granted Sep 24, 2019·2 cites·20 claims
- 1071US5724250AMethod and apparatus for performing drive strength adjust optimization in a circuit designUNISYS CORP·Filed 1996·Granted Mar 3, 1998·65 cites·45 claims
- 1170US5555396AHierarchical queuing in a system architecture for improved message passing and process synchronizationUNISYS CORP·Filed 1994·Granted Sep 10, 1996·55 cites·4 claims
- 1269US6701289B1Method and apparatus for using a placement tool to manipulate cell substitution listsUNISYS CORP·Filed 1997·Granted Mar 2, 2004·60 cites·33 claims
- 1366US6910200B1Method and apparatus for associating selected circuit instances and for performing a group operation thereonUNISYS CORP·Filed 1997·Granted Jun 21, 2005·54 cites·26 claims
- 1466US5726903AMethod and apparatus for resolving conflicts between cell substitution recommendations provided by a drive strength adjust toolUNISYS CORP·Filed 1996·Granted Mar 10, 1998·50 cites·57 claims
- 1566US5719783AMethod and apparatus for performing timing analysis on a circuit designUNISYS CORP·Filed 1996·Granted Feb 17, 1998·54 cites·12 claims
- 1660US5912820AMethod and apparatus for distributing a clock tree within a hierarchical circuit designUNISYS CORP·Filed 1997·Granted Jun 15, 1999·38 cites·33 claims
- 1754US5577259AInstruction processor control system using separate hardware and microcode control signals to control the pipelined execution of multiple classes of machine instructionsUNISYS CORP·Filed 1994·Granted Nov 19, 1996·30 cites·30 claims
- 1852US7076410B1Method and apparatus for efficiently viewing a number of selected components using a database editor toolUNISYS CORP·Filed 1997·Granted Jul 11, 2006·25 cites·41 claims
- 1947US5611065AAddress prediction for relative-to-absolute addressingUNISYS CORP·Filed 1994·Granted Mar 11, 1997·20 cites·10 claims
- 2046US2004128638A1Method and apparatus for selecting and aligning cells using a placement toolFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →