Inventor · disambiguated record
John D. Logue
Also filed as: LOGUE JOHN · LOGUE JOHN D
20 granted patents·1 pending application·823 citations·filing 1998–2020
96Inventor score
Top patents by PatentIndex Score
21 records- 0197US7126372B2Reconfiguration port for dynamic reconfiguration—sub-frame access for reconfigurationXILINX INC·Filed 2004·Granted Oct 24, 2006·151 cites·18 claims
- 0296US7218137B2Reconfiguration port for dynamic reconfigurationXILINX INC·Filed 2004·Granted May 15, 2007·100 cites·31 claims
- 0395US7187742B1Synchronized multi-output digital clock managerXILINX INC·Filed 2000·Granted Mar 6, 2007·71 cites·17 claims
- 0493US6289068B1Delay lock loop with clock phase shifterXILINX INC·Filed 1998·Granted Sep 11, 2001·169 cites·24 claims
- 0590US7142823B1Low jitter digital frequency synthesizer and control thereofXILINX INC·Filed 2004·Granted Nov 28, 2006·45 cites·36 claims
- 0686US7010014B1Digital spread spectrum circuitryXILINX INC·Filed 2000·Granted Mar 7, 2006·39 cites·5 claims
- 0786US6983394B1Method and apparatus for clock signal performance measurementXILINX INC·Filed 2003·Granted Jan 3, 2006·52 cites·40 claims
- 0884US7233532B2Reconfiguration port for dynamic reconfiguration-system monitor interfaceXILINX INC·Filed 2004·Granted Jun 19, 2007·26 cites·23 claims
- 0984US6775342B1Digital phase shifterXILINX INC·Filed 2000·Granted Aug 10, 2004·28 cites·31 claims
- 1080US6587534B2Delay lock loop with clock phase shifterXILINX INC·Filed 2001·Granted Jul 1, 2003·21 cites·10 claims
- 1179US7564264B1Preventing transistor damageXILINX INC·Filed 2007·Granted Jul 21, 2009·13 cites·18 claims
- 1275US7109750B2Reconfiguration port for dynamic reconfiguration-controllerXILINX INC·Filed 2004·Granted Sep 19, 2006·17 cites·35 claims
- 1373US6445232B1Digital clock multiplier and divider with output waveform shapingXILINX INC·Filed 2000·Granted Sep 3, 2002·19 cites·16 claims
- 1472US8591440B2Devices and methods for adjustable foot correctionLOGUE JOHN D·Filed 2005·Granted Nov 26, 2013·12 cites·27 claims
- 1571US6384647B1Digital clock multiplier and divider with sychronization during concurrencesXILINX INC·Filed 2000·Granted May 7, 2002·18 cites·23 claims
- 1668US7564283B1Automatic tap delay calibration for precise digital phase shiftXILINX INC·Filed 2004·Granted Jul 21, 2009·15 cites·24 claims
- 1766US8270335B1Arbitration for time division multiple access using delta sigma modulationLOGUE JOHN D·Filed 2008·Granted Sep 18, 2012·3 cites·18 claims
- 1866US8229049B1Method and apparatus for providing a monitor using an auxiliary delay lineLOGUE JOHN D·Filed 2009·Granted Jul 24, 2012·3 cites·20 claims
- 1959US6737925B1Method and apparatus for controlling supply voltage levels for integrated circuitsXILINX INC·Filed 2002·Granted May 18, 2004·12 cites·23 claims
- 2057US6448915B1Modulo-M delta sigma circuitXILINX INC·Filed 2000·Granted Sep 10, 2002·9 cites·11 claims
- 2146US2020253773A1Systems and methods for supporting a legGait Dynamics LLC·Filed 2020·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when John D. Logue files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →