Inventor · disambiguated record
John V. Lovelace
Also filed as: LOVELACE JOHN V · LOVELACE JOHN VANCLEVE
1 granted patent·5 pending applications·0 citations·filing 2016–2024
6Inventor score
Files withINTEL CORP6
Top patents by PatentIndex Score
6 records- 0147US2023136268A1Autonomous backside data buffer to memory chip write training controlINTEL CORP·Filed 2022·Application pending·0 cites
- 0245US2022276958A1Apparatus and method for per memory chip addressingINTEL CORP·Filed 2022·Application pending·0 cites
- 0341US10289431B2Technologies for reduced control and status register access latencyINTEL CORP·Filed 2016·Granted May 14, 2019·0 cites·23 claims
- 0441US2023125412A1Autonomous dimm write leveling trainingINTEL CORP·Filed 2022·Application pending·0 cites
- 0539US2022300197A1Autonomous backside chip select (cs) and command/address (ca) training modesINTEL CORP·Filed 2022·Application pending·0 cites
- 0639US2024257890A1Methods and apparatus to select addresses for memory trainingINTEL CORP·Filed 2024·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when John V. Lovelace files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →