Inventor · disambiguated record
Joodong Park
Also filed as: PARK JOODONG
40 granted patents·4 pending applications·127 citations·filing 2007–2024
97Inventor score
Top patents by PatentIndex Score
44 records- 0194US9159734B2Antifuse element utilizing non-planar topologyHAFEZ WALID M·Filed 2011·Granted Oct 13, 2015·21 cites·23 claims
- 0294US8981481B2High voltage three-dimensional devices having dielectric linersHAFEZ WALID M·Filed 2012·Granted Mar 17, 2015·12 cites·15 claims
- 0393US9972642B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2017·Granted May 15, 2018·5 cites·20 claims
- 0492US10096599B2Methods of integrating multiple gate dielectric transistors on a tri-gate (finFET) processINTEL CORP·Filed 2015·Granted Oct 9, 2018·7 cites·6 claims
- 0592US9786783B2Transistor architecture having extended recessed spacer and source/drain regions and method of making sameINTEL CORP·Filed 2013·Granted Oct 10, 2017·16 cites·25 claims
- 0691US8796772B2Precision resistor for non-planar semiconductor device architectureYEH JENG-YA D·Filed 2012·Granted Aug 5, 2014·14 cites·24 claims
- 0791US2025031446A1High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2024·Application pending·0 cites
- 0889US10204999B2Transistor with airgap spacerINTEL CORP·Filed 2015·Granted Feb 12, 2019·8 cites·8 claims
- 0988US12136628B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2023·Granted Nov 5, 2024·0 cites·20 claims
- 1087US10431661B2Transistor with inner-gate spacerINTEL CORP·Filed 2015·Granted Oct 1, 2019·5 cites·20 claims
- 1187US9570467B2High voltage three-dimensional devices having dielectric linersHAFEZ WALID M·Filed 2015·Granted Feb 14, 2017·3 cites·5 claims
- 1286US8889508B2Precision resistor for non-planar semiconductor device architectureYEH JENG-YA D·Filed 2014·Granted Nov 18, 2014·8 cites·6 claims
- 1385US11881486B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2023·Granted Jan 23, 2024·0 cites·20 claims
- 1485US10535747B2Transistor with dual-gate spacerINTEL CORP·Filed 2015·Granted Jan 14, 2020·5 cites·21 claims
- 1581US11276760B2Non-planar semiconductor device having omega-fin with doped sub-fin region and method to fabricate sameINTEL CORP·Filed 2019·Granted Mar 15, 2022·2 cites·7 claims
- 1681US10304681B2Dual height glass for finFET dopingINTEL CORP·Filed 2015·Granted May 28, 2019·3 cites·9 claims
- 1780US11610917B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2022·Granted Mar 21, 2023·0 cites·25 claims
- 1880US9748252B2Antifuse element utilizing non-planar topologyINTEL CORP·Filed 2015·Granted Aug 29, 2017·3 cites·20 claims
- 1978US9780217B2Non-planar semiconductor device having self-aligned fin with top blocking layerINTEL CORP·Filed 2013·Granted Oct 3, 2017·3 cites·22 claims
- 2075US11251201B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2020·Granted Feb 15, 2022·0 cites·20 claims
- 2174US10923574B2Transistor with inner-gate spacerINTEL CORP·Filed 2019·Granted Feb 16, 2021·1 cites·20 claims
- 2274US10847544B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2020·Granted Nov 24, 2020·0 cites·20 claims
- 2372US9881927B2CMOS-compatible polycide fuse structure and method of fabricating sameINTEL CORP·Filed 2013·Granted Jan 30, 2018·3 cites·6 claims
- 2471US11695008B2Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) processINTEL CORP·Filed 2020·Granted Jul 4, 2023·0 cites·9 claims
- 2570US9520494B2Vertical non-planar semiconductor device for system-on-chip (SoC) applicationsINTEL CORP·Filed 2013·Granted Dec 13, 2016·2 cites·22 claims
- 2668US10892261B2Metal resistor and self-aligned gate edge (SAGE) architecture having a metal resistorINTEL CORP·Filed 2016·Granted Jan 12, 2021·1 cites·15 claims
- 2766US10692888B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2018·Granted Jun 23, 2020·0 cites·14 claims
- 2866US10559688B2Transistor with thermal performance boostINTEL CORP·Filed 2016·Granted Feb 11, 2020·1 cites·20 claims
- 2965US2022130962A1Non-planar semiconductor device having omega-fin with doped sub-fin region and method to fabricate sameINTEL CORP·Filed 2022·Application pending·0 cites
- 3064US10658361B2Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) processTSAI CURTIS·Filed 2011·Granted May 19, 2020·1 cites·8 claims
- 3164US9741721B2Low leakage non-planar access transistor for embedded dynamic random access memory (eDRAM)INTEL CORP·Filed 2013·Granted Aug 22, 2017·1 cites·18 claims
- 3261US9806095B2High voltage three-dimensional devices having dielectric linersINTEL CORP·Filed 2015·Granted Oct 31, 2017·0 cites·14 claims
- 3360US10340220B2Compound lateral resistor structures for integrated circuitryINTEL CORP·Filed 2015·Granted Jul 2, 2019·1 cites·20 claims
- 3457US7691718B2Dual layer hard mask for block salicide poly resistor (BSR) patterningINTEL CORP·Filed 2007·Granted Apr 6, 2010·1 cites·13 claims
- 3555US10355093B2Non-planar semiconductor device having omega-fin with doped sub-fin region and method to fabricate sameINTEL CORP·Filed 2014·Granted Jul 16, 2019·0 cites·27 claims
- 3654US11114538B2Transistor with an airgap spacer adjacent to a transistor gateINTEL CORP·Filed 2018·Granted Sep 7, 2021·0 cites·20 claims
- 3752US10263112B2Vertical non-planar semiconductor device for system-on-chip (SoC) applicationsINTEL CORP·Filed 2016·Granted Apr 16, 2019·0 cites·12 claims
- 3850US11824002B2Variable pitch and stack height for high performance interconnectsINTEL CORP·Filed 2019·Granted Nov 21, 2023·0 cites·25 claims
- 3943US11063137B2Asymmetric spacer for low capacitance applicationsINTEL CORP·Filed 2016·Granted Jul 13, 2021·0 cites·18 claims
- 4043US2017162693A1Apparatus and methods to create microelectronic device isolation by catalytic oxide formationINTEL CORP·Filed 2014·Application pending·0 cites
- 4143US2010164001A1Implant process for blocked salicide poly resistor and structures formed therebyPARK JOODONG·Filed 2008·Application pending·0 cites
- 4240US10784378B2Ultra-scaled fin pitch having dual gate dielectricsINTEL CORP·Filed 2016·Granted Sep 22, 2020·0 cites·12 claims
- 4337US11121040B2Multi voltage threshold transistors through process and design-induced multiple work functionsINTEL CORP·Filed 2016·Granted Sep 14, 2021·0 cites·20 claims
- 4432US8669617B2Multi-gate transistorsJAN CHIA-HONG·Filed 2010·Granted Mar 11, 2014·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →