Inventor · disambiguated record
Jorge Eduardo Parra Osorio
Also filed as: PARRA OSORIO JORGE E · PARRA OSORIO JORGE EDUARDO
1 granted patent·12 pending applications·0 citations·filing 2021–2024
13Inventor score
Files withINTEL CORP13
Top patents by PatentIndex Score
13 records- 0173US2025199858A1Multiple register allocation sizes for threadsINTEL CORP·Filed 2024·Application pending·0 cites
- 0264US12210905B2Multiple register allocation sizes for threadsINTEL CORP·Filed 2021·Granted Jan 28, 2025·0 cites·20 claims
- 0358US2025036361A1Floating-point conversion via an integer unitINTEL CORP·Filed 2023·Application pending·0 cites
- 0457US2025068473A1Distributed register file cache to reduce l1 bandwidth requirementsINTEL CORP·Filed 2023·Application pending·0 cites
- 0555US2025147762A1Multiple register allocation sizes for gpu hardware threadsINTEL CORP·Filed 2023·Application pending·0 cites
- 0654US2025110733A1Conversion operations and special value use cases supporting 8-bit floating point format in a graphics architectureINTEL CORP·Filed 2023·Application pending·0 cites
- 0751US2025036412A1Avoiding the use of a result crossbar when down converting to packed register formatsINTEL CORP·Filed 2023·Application pending·0 cites
- 0851US2025110741A1Supporting 8-bit floating point format for parallel computing and stochastic rounding operations in a graphics architectureINTEL CORP·Filed 2023·Application pending·0 cites
- 0951US2025068423A1Instruction encoding to implement increased register capacity per threadINTEL CORP·Filed 2023·Application pending·0 cites
- 1051US2025037347A132-bit channel-aligned integer multiplication via multiple multipliers per-channelINTEL CORP·Filed 2023·Application pending·0 cites
- 1148US2024168807A1Cross-thread register sharing for matrix multiplication computeINTEL CORP·Filed 2022·Application pending·0 cites
- 1248US2024169021A1Enhancements for accumulator usage and instruction forwarding in matrix multiply pipeline in graphics environmentINTEL CORP·Filed 2022·Application pending·0 cites
- 1345US2024168723A1Matrix transposition in matrix multiplication array circuitryINTEL CORP·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →