Inventor · disambiguated record
John M. Pierce
Also filed as: PIERCE JOHN · PIERCE JOHN M
20 granted patents·658 citations·filing 1975–2004
96Inventor score
Files withNAT SEMICONDUCTOR CORP9FAIRCHILD CAMERA INSTR CO6MICKEY TRUCK BODIES INC2DEVELCO1FAIRCHILD CAMERA AND INSTR1
Top patents by PatentIndex Score
20 records- 0195US5287663APolishing pad and method for polishing semiconductor wafersNAT SEMICONDUCTOR CORP·Filed 1992·Granted Feb 22, 1994·141 cites·7 claims
- 0285US6406093B1Attachment for seat assemblyLEAR CORP·Filed 2000·Granted Jun 18, 2002·62 cites·17 claims
- 0385US4267012AProcess for patterning metal connections on a semiconductor structure by using a tungsten-titanium etch resistant layerFAIRCHILD CAMERA INSTR CO·Filed 1979·Granted May 12, 1981·47 cites·19 claims
- 0480US5883010AMethod for protecting nonsilicided surfaces from silicide formation using spacer oxide maskNAT SEMICONDUCTOR CORP·Filed 1997·Granted Mar 16, 1999·50 cites·11 claims
- 0579US5302551AMethod for planarizing the surface of an integrated circuit over a metal interconnect layerNAT SEMICONDUCTOR CORP·Filed 1992·Granted Apr 12, 1994·60 cites·18 claims
- 0677US4619844AMethod and apparatus for low pressure chemical vapor depositionFAIRCHILD CAMERA INSTR CO·Filed 1985·Granted Oct 28, 1986·35 cites·16 claims
- 0776US5422289AMethod of manufacturing a fully planarized MOSFET and resulting structureNAT SEMICONDUCTOR CORP·Filed 1992·Granted Jun 6, 1995·61 cites·21 claims
- 0868US5683941ASelf-aligned polycide process that utilizes a planarized layer of material to expose polysilicon structures to a subsequently deposited metal layer that is reacted to form the metal silicideNAT SEMICONDUCTOR CORP·Filed 1996·Granted Nov 4, 1997·38 cites·71 claims
- 0967US5094972AMeans of planarizing integrated circuits with fully recessed isolation dielectricNAT SEMICONDUCTOR CORP·Filed 1990·Granted Mar 10, 1992·43 cites·9 claims
- 1060US6786373B2Adjustable frame for retaining hand truck on vehicular bodyMICKEY TRUCK BODIES INC·Filed 2001·Granted Sep 7, 2004·12 cites·85 claims
- 1159US5589412AMethod of making increased-density flash EPROM that utilizes a series of planarized, self-aligned, intermediate strips of conductive material to contact the drain regionsNAT SEMICONDUCTOR CORP·Filed 1995·Granted Dec 31, 1996·17 cites·8 claims
- 1258US4352239AProcess for suppressing electromigration in conducting lines formed on integrated circuits by control of crystalline boundary orientationFAIRCHILD CAMERA AND INSTR·Filed 1980·Granted Oct 5, 1982·22 cites·2 claims
- 1356US5759882AMethod of fabricating self-aligned contacts and local interconnects in CMOS and BICMOS processes using chemical mechanical polishing (CMP)NAT SEMICONDUCTOR CORP·Filed 1996·Granted Jun 2, 1998·24 cites·21 claims
- 1452US6948645B2Adjustable frame for retaining hand truck on vehicular bodyMICKEY TRUCK BODIES INC·Filed 2004·Granted Sep 27, 2005·9 cites·4 claims
- 1541US4630343AProduct for making isolated semiconductor structureFAIRCHILD CAMERA INSTR CO·Filed 1985·Granted Dec 23, 1986·11 cites·10 claims
- 1639US4489482AImpregnation of aluminum interconnects with copperFAIRCHILD CAMERA INSTR CO·Filed 1983·Granted Dec 25, 1984·8 cites·6 claims
- 1737US4490737ASmooth glass insulating film over interconnects on an integrated circuitFAIRCHILD CAMERA INSTR CO·Filed 1982·Granted Dec 25, 1984·7 cites·6 claims
- 1834US4221834ASuperconductive magnetic shield and method of making sameDEVELCO·Filed 1975·Granted Sep 9, 1980·5 cites·5 claims
- 1932US4727048AProcess for making isolated semiconductor structureFAIRCHILD CAMERA INSTR CO·Filed 1986·Granted Feb 23, 1988·4 cites·17 claims
- 2031US6008107AMethod of planarizing integrated circuits with fully recessed isolation dielectricNAT SEMICONDUCTOR CORP·Filed 1997·Granted Dec 28, 1999·2 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →