Inventor · disambiguated record
John R. Wilford
Also filed as: WILFORD JOHN · WILFORD JOHN R
23 granted patents·638 citations·filing 1996–2013
96Inventor score
Top patents by PatentIndex Score
23 records- 0196US6111812AMethod and apparatus for adjusting control signal timing in a memory deviceMICRON TECHNOLOGY INC·Filed 1999·Granted Aug 29, 2000·133 cites·33 claims
- 0295US6317381B1Method and system for adaptively adjusting control signal timing in a memory deviceMICRON TECHNOLOGY INC·Filed 1999·Granted Nov 13, 2001·137 cites·31 claims
- 0395US6304511B1Method and apparatus for adjusting control signal timing in a memory deviceMICRON TECHNOLOGY INC·Filed 2000·Granted Oct 16, 2001·95 cites·29 claims
- 0486US6128244AMethod and apparatus for accessing one of a plurality of memory units within an electronic memory deviceMICRON TECHNOLOGY INC·Filed 1998·Granted Oct 3, 2000·78 cites·54 claims
- 0582US6242949B1Digital voltage translator and its method of operationMICRON TECHNOLOGY INC·Filed 2000·Granted Jun 5, 2001·22 cites·25 claims
- 0681US7532532B2System and method for hidden-refresh rate modificationMICRON TECHNOLOGY INC·Filed 2005·Granted May 12, 2009·9 cites·27 claims
- 0777US5978311AMemory with combined synchronous burst and bus efficient functionalityMICRON TECHNOLOGY INC·Filed 1998·Granted Nov 2, 1999·31 cites·25 claims
- 0876US6323076B1Integrated circuit having temporary conductive path structure and method for forming the sameMICRON TECHNOLOGY INC·Filed 2000·Granted Nov 27, 2001·18 cites·24 claims
- 0973US8130585B2System and method for hidden-refresh rate modificationSCHRECK JOHN·Filed 2009·Granted Mar 6, 2012·6 cites·18 claims
- 1064US8559259B2System and method for hidden refresh rate modificationSCHRECK JOHN·Filed 2012·Granted Oct 15, 2013·2 cites·24 claims
- 1164US6020762ADigital voltage translator and its method of operationMICRON TECHNOLOGY INC·Filed 1998·Granted Feb 1, 2000·16 cites·61 claims
- 1259US6219283B1Memory device with local write data latchesMICRON TECHNOLOGY INC·Filed 1998·Granted Apr 17, 2001·18 cites·20 claims
- 1359US6163500AMemory with combined synchronous burst and bus efficient functionalityMICRON TECHNOLOGY INC·Filed 1999·Granted Dec 19, 2000·14 cites·21 claims
- 1457US7050342B2Testmode to increase acceleration in burn-inMICRON TECHNOLOGY INC·Filed 2003·Granted May 23, 2006·8 cites·15 claims
- 1557US6433403B1Integrated circuit having temporary conductive path structure and method for forming the sameMICRON TECHNOLOGY INC·Filed 1999·Granted Aug 13, 2002·14 cites·35 claims
- 1654US6272064B1Memory with combined synchronous burst and bus efficient functionalityMICRON TECHNOLOGY INC·Filed 2000·Granted Aug 7, 2001·6 cites·23 claims
- 1749US8902688B2Apparatus and method for hidden-refresh modificationMICRON TECHNOLOGY INC·Filed 2013·Granted Dec 2, 2014·0 cites·23 claims
- 1849US6469954B1Device and method for reducing idle cycles in a semiconductor memory deviceMICRON TECHNOLOGY INC·Filed 2000·Granted Oct 22, 2002·4 cites·27 claims
- 1947US6621755B2Testmode to increase acceleration in burn-inMICRON TECHNOLOGY INC·Filed 2001·Granted Sep 16, 2003·4 cites·21 claims
- 2046US5757713AAdjustable write voltage circuit for SRAMSMICRON TECHNOLOGY INC·Filed 1996·Granted May 26, 1998·10 cites·52 claims
- 2144US5905682AMethod and apparatus for biasing the substrate of an integrated circuit to an externally adjustable voltageMICRON TECHNOLOGY INC·Filed 1997·Granted May 18, 1999·9 cites·40 claims
- 2243US6721233B2Circuit and method for reducing memory idle cyclesMICRON TECHNOLOGY INC·Filed 2003·Granted Apr 13, 2004·2 cites·11 claims
- 2342US6570816B2Circuit and method for reducing memory idle cyclesMICRON TECHNOLOGY INC·Filed 2002·Granted May 27, 2003·2 cites·11 claims
Join the waitlist — get patent alerts
Get an alert when John R. Wilford files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →