Inventor · disambiguated record
Joe Zelayeta
Also filed as: ZELAYETA JOE
16 granted patents·320 citations·filing 1993–1996
94Inventor score
Files withLSI LOGIC CORP16
Top patents by PatentIndex Score
16 records- 0179US5643830AProcess for manufacturing off-axis power branches for interior bond pad arrangementsLSI LOGIC CORP·Filed 1995·Granted Jul 1, 1997·53 cites·11 claims
- 0277US5384487AOff-axis power branches for interior bond pad arrangementsLSI LOGIC CORP·Filed 1993·Granted Jan 24, 1995·50 cites·18 claims
- 0371US5478698ADirect-write afocal electron-beam semiconductor lithographyLSI LOGIC CORP·Filed 1993·Granted Dec 26, 1995·32 cites·10 claims
- 0470US5567655AMethod for forming interior bond pads having zig-zag linear arrangementLSI LOGIC CORP·Filed 1995·Granted Oct 22, 1996·40 cites·12 claims
- 0569US6078502ASystem having heat dissipating leadframesLSI LOGIC CORP·Filed 1996·Granted Jun 20, 2000·39 cites·25 claims
- 0659US5374974AHigh speed shuttle for gating a radiation beam, particularly for semiconductor lithography apparatusLSI LOGIC CORP·Filed 1993·Granted Dec 20, 1994·16 cites·36 claims
- 0758US5557066AMolding compounds having a controlled thermal coefficient of expansion, and their uses in packaging electronic devicesLSI LOGIC CORP·Filed 1995·Granted Sep 17, 1996·23 cites·19 claims
- 0855US5567570AGamma ray techniques applicable to semiconductor lithographyLSI LOGIC CORP·Filed 1995·Granted Oct 22, 1996·13 cites·7 claims
- 0953US5666189AProcess for performing low wavelength photolithography on semiconductor wafer using afocal concentrationLSI LOGIC CORP·Filed 1995·Granted Sep 9, 1997·12 cites·10 claims
- 1053US5453583AInterior bond pad arrangements for alleviating thermal stressesLSI LOGIC CORP·Filed 1993·Granted Sep 26, 1995·20 cites·24 claims
- 1151US5591564AGamma ray techniques applicable to semiconductor lithographyLSI LOGIC CORP·Filed 1993·Granted Jan 7, 1997·8 cites·21 claims
- 1240US5572562AImage mask substrate for X-ray semiconductor lithographyLSI LOGIC CORP·Filed 1994·Granted Nov 5, 1996·5 cites·10 claims
- 1338US5345310AIdentifying and compensating for slip-plane dislocations in photolithographic mask alignmentLSI LOGIC CORP·Filed 1993·Granted Sep 6, 1994·4 cites·10 claims
- 1435US5485243AAfocal concentrator for low wavelength lithography, particularly for semiconductor lithographyLSI LOGIC CORP·Filed 1993·Granted Jan 16, 1996·3 cites·33 claims
- 1532US5554484AGamma radiation sensitive resist materials for semiconductor lithographyLSI LOGIC CORP·Filed 1994·Granted Sep 10, 1996·1 cites·14 claims
- 1631US5512395AImage masks for semiconductor lithographyLSI LOGIC CORP·Filed 1994·Granted Apr 30, 1996·1 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →