Inventor · disambiguated record
Judy L. Hoyt
Also filed as: HOYT JUDY L
11 granted patents·3 pending applications·799 citations·filing 1987–2014
93Inventor score
Files withMASSACHUSETTS INST TECHNOLOGY4HEWLETT PACKARD CO3UNIV LELAND STANFORD JUNIOR2ANTONIADIS DIMITRI A1GOMEZ LEONARDO1
Top patents by PatentIndex Score
14 records- 0197US6573126B2Process for producing semiconductor article using graded epitaxial growthMASSACHUSETTS INST TECHNOLOGY·Filed 2001·Granted Jun 3, 2003·209 cites·44 claims
- 0296US6737670B2Semiconductor substrate structureMASSACHUSETTS INST TECHNOLOGY·Filed 2003·Granted May 18, 2004·90 cites·53 claims
- 0395US7920770B2Reduction of substrate optical leakage in integrated photonic circuits through localized substrate removalMASSACHUSETTS INST TECHNOLOGY·Filed 2008·Granted Apr 5, 2011·57 cites·21 claims
- 0495US6713326B2Process for producing semiconductor article using graded epitaxial growthMASACHUSETTS INST OF TECHNOLOG·Filed 2003·Granted Mar 30, 2004·150 cites·19 claims
- 0592US6921914B2Process for producing semiconductor article using graded epitaxial growthMASSACHUSETTS INST TECHNOLOGY·Filed 2004·Granted Jul 26, 2005·49 cites·9 claims
- 0692US5202284ASelective and non-selective deposition of Si1-x Gex on a Si subsrate that is partially masked with SiO2HEWLETT PACKARD CO·Filed 1989·Granted Apr 13, 1993·128 cites·5 claims
- 0777US5256550AFabricating a semiconductor device with strained Si1-x Gex layerHEWLETT PACKARD CO·Filed 1991·Granted Oct 26, 1993·69 cites·18 claims
- 0864US7867859B1Gate electrode with depletion suppression and tunable workfunctionUNIV LELAND STANFORD JUNIOR·Filed 2008·Granted Jan 11, 2011·2 cites·12 claims
- 0960US4787551AMethod of welding thermocouples to silicon wafers for temperature monitoring in rapid thermal processingUNIV STANFORD·Filed 1987·Granted Nov 29, 1988·24 cites·8 claims
- 1055US5084411ASemiconductor processing with silicon cap over Si1-x Gex FilmHEWLETT PACKARD CO·Filed 1988·Granted Jan 28, 1992·21 cites·3 claims
- 1145US9269633B2Method for forming gate electrode with depletion suppression and tunable workfunctionUNIV LELAND STANFORD JUNIOR·Filed 2014·Granted Feb 23, 2016·0 cites·15 claims
- 1237US2005274978A1Single metal gate material CMOS using strained si-silicon germanium heterojunction layered substrateANTONIADIS DIMITRI A·Filed 2005·Application pending·0 cites
- 1337US2009072271A1EPITAXIAL GROWTH OF THIN SMOOTH GERMANIUM (Ge) ON SILICON (Si) UTILIZING AN INTERFACIAL SILICON GERMANIUM (SiGe) PULSE GROWTH METHODGOMEZ LEONARDO·Filed 2008·Application pending·0 cites
- 1436US2004113211A1Gate electrode with depletion suppression and tunable workfunctionFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →