Inventor · disambiguated record
Jungwon Suh
Also filed as: SUH JUNGWON
91 granted patents·15 pending applications·551 citations·filing 2003–2025
99Inventor score
Files withQUALCOMM INC77INFINEON TECHNOLOGIES AG12SUH JUNGWON4HAO WUYANG3INFINEON TECHNOLOGIES CORP3
Top patents by PatentIndex Score
106 records- 0198US12230347B2System and memory with configurable metadata portionQUALCOMM INC·Filed 2023·Granted Feb 18, 2025·14 cites·12 claims
- 0296US9299457B2Kernel masking of DRAM defectsQUALCOMM INC·Filed 2014·Granted Mar 29, 2016·47 cites·36 claims
- 0395US11175836B2Enhanced data clock operations in memoryQUALCOMM INC·Filed 2020·Granted Nov 16, 2021·5 cites·42 claims
- 0494US11360897B1Adaptive memory access managementQUALCOMM INC·Filed 2021·Granted Jun 14, 2022·5 cites·30 claims
- 0594US8492905B2Vertically stackable dies having chip identifier structuresSUH JUNGWON·Filed 2010·Granted Jul 23, 2013·31 cites·18 claims
- 0693US10169262B2Low-power clocking for a high-speed memory interfaceQUALCOMM INC·Filed 2016·Granted Jan 1, 2019·13 cites·30 claims
- 0793US8547736B2Generating a non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junctionRAO HARI M·Filed 2010·Granted Oct 1, 2013·19 cites·25 claims
- 0891US11893240B2Reducing latency in pseudo channel based memory systemsQUALCOMM INC·Filed 2021·Granted Feb 6, 2024·2 cites·26 claims
- 0991US10222853B2Power saving techniques for memory systems by consolidating data in data lanes of a memory busQUALCOMM INC·Filed 2017·Granted Mar 5, 2019·7 cites·26 claims
- 1091US9087765B2System-in-package with interposer pitch adapterQUALCOMM INC·Filed 2013·Granted Jul 21, 2015·14 cites·19 claims
- 1190US10331517B2Link error correction in memory systemQUALCOMM INC·Filed 2017·Granted Jun 25, 2019·9 cites·17 claims
- 1290US9965352B2Separate link and array error correction in a memory systemQUALCOMM INC·Filed 2016·Granted May 8, 2018·8 cites·23 claims
- 1390US8982654B2DRAM sub-array level refreshQUALCOMM INC·Filed 2013·Granted Mar 17, 2015·13 cites·20 claims
- 1490US8493134B2Method and apparatus to provide a clock signal to a charge pumpHAO WUYANG·Filed 2010·Granted Jul 23, 2013·19 cites·44 claims
- 1589US10332582B2Partial refresh technique to save memory refresh powerQUALCOMM INC·Filed 2017·Granted Jun 25, 2019·6 cites·27 claims
- 1689US9911485B2Method and apparatus for refreshing a memory cellQUALCOMM INC·Filed 2014·Granted Mar 6, 2018·13 cites·30 claims
- 1789US8621324B2Embedded DRAM having low power self-correction capabilitySUH JUNGWON·Filed 2010·Granted Dec 31, 2013·15 cites·57 claims
- 1888US11551730B2Low power memory system using dual input-output voltage suppliesQUALCOMM INC·Filed 2021·Granted Jan 10, 2023·2 cites·30 claims
- 1988US11164618B2Partial refresh technique to save memory refresh powerQUALCOMM INC·Filed 2020·Granted Nov 2, 2021·2 cites·30 claims
- 2088US9304913B2Mixed memory type hybrid cacheQUALCOMM INC·Filed 2013·Granted Apr 5, 2016·11 cites·20 claims
- 2188US8578222B2SerDes power throttling as a function of detected error rateCHUN DEXTER T·Filed 2011·Granted Nov 5, 2013·15 cites·49 claims
- 2287US8698321B2Vertically stackable dies having chip identifier structuresSUH JUNGWON·Filed 2009·Granted Apr 15, 2014·15 cites·15 claims
- 2386US10140175B2Protecting an ECC location when transmitting correction data across a memory linkQUALCOMM INC·Filed 2016·Granted Nov 27, 2018·5 cites·30 claims
- 2486US9779798B1Systems, methods, and computer programs for providing row tamper protection in a multi-bank memory cell arrayQUALCOMM INC·Filed 2017·Granted Oct 3, 2017·7 cites·24 claims
- 2586US2025292857A1Hybrid memory system with increased bandwidthQUALCOMM INC·Filed 2025·Application pending·0 cites
- 2685US10852809B2Power saving techniques for memory systems by consolidating data in data lanes of a memory busQUALCOMM INC·Filed 2019·Granted Dec 1, 2020·3 cites·27 claims
- 2785US10409540B2Electronic device including a plurality of touch displays and method for changing status thereofSAMSUNG ELECTRONICS CO LTD·Filed 2017·Granted Sep 10, 2019·11 cites·18 claims
- 2885US9812222B2Method and apparatus for in-system management and repair of semi-conductor memory failureQUALCOMM INC·Filed 2015·Granted Nov 7, 2017·5 cites·30 claims
- 2985US9766092B2Method for performing function using sensor data and electronic device for providing sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Sep 19, 2017·5 cites·20 claims
- 3085US9524771B2DRAM sub-array level autonomic refresh memory controller optimizationQUALCOMM INC·Filed 2014·Granted Dec 20, 2016·10 cites·21 claims
- 3185US6859407B1Memory with auto refresh to designated banksINFINEON TECHNOLOGIES AG·Filed 2004·Granted Feb 22, 2005·42 cites·24 claims
- 3284US11907141B1Flexible dual ranks memory system to boost performanceQUALCOMM INC·Filed 2022·Granted Feb 20, 2024·1 cites·27 claims
- 3384US7196954B2Sensing current recycling method during self-refreshINFINEON TECHNOLOGIES AG·Filed 2005·Granted Mar 27, 2007·15 cites·18 claims
- 3484US2025111885A1System and memory with configurable metadata portionQUALCOMM INC·Filed 2024·Application pending·0 cites
- 3583US9411727B2Split write operation for resistive memory cacheQUALCOMM INC·Filed 2015·Granted Aug 9, 2016·3 cites·18 claims
- 3681US12340859B2Hybrid memory system with increased bandwidthQUALCOMM INC·Filed 2024·Granted Jun 24, 2025·0 cites·14 claims
- 3781US10394724B2Low power data transfer for memory subsystem using data pattern checker to determine when to suppress transfers based on specific patternsQUALCOMM INC·Filed 2016·Granted Aug 27, 2019·3 cites·34 claims
- 3881US10185515B2Unified memory controller for heterogeneous memory on a multi-chip packageQUALCOMM INC·Filed 2013·Granted Jan 22, 2019·6 cites·25 claims
- 3981US8797792B2Non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junctionQUALCOMM INC·Filed 2013·Granted Aug 5, 2014·6 cites·20 claims
- 4079US8638590B2Resistance based memory having two-diode access deviceHAO WUYANG·Filed 2010·Granted Jan 28, 2014·6 cites·14 claims
- 4177US12307092B2Reducing latency in pseudo channel based memory systemsQUALCOMM INC·Filed 2023·Granted May 20, 2025·0 cites·21 claims
- 4277US11295803B2Memory with dynamic voltage scalingQUALCOMM INC·Filed 2020·Granted Apr 5, 2022·1 cites·42 claims
- 4377US2025251862A1Reducing latency in pseudo channel based memory systemsQUALCOMM INC·Filed 2025·Application pending·0 cites
- 4476US10726904B2Partial refresh technique to save memory refresh powerQUALCOMM INC·Filed 2019·Granted Jul 28, 2020·2 cites·27 claims
- 4576US9224452B2Heterogeneous memory systems, and related methods and computer-readable media for supporting heterogeneous memory access requests in processor-based systemsQUALCOMM INC·Filed 2013·Granted Dec 29, 2015·4 cites·50 claims
- 4676US8786355B2Low-power voltage reference circuitHAO WUYANG·Filed 2011·Granted Jul 22, 2014·5 cites·21 claims
- 4775US12504876B2Flexible metadata regions for a memory deviceQUALCOMM INC·Filed 2023·Granted Dec 23, 2025·0 cites·26 claims
- 4875US9245871B2Vertically stackable dies having chip identifier structuresQUALCOMM INC·Filed 2013·Granted Jan 26, 2016·3 cites·30 claims
- 4975US9239788B2Split write operation for resistive memory cacheQUALCOMM INC·Filed 2013·Granted Jan 19, 2016·4 cites·8 claims
- 5075US9224442B2System and method to dynamically determine a timing parameter of a memory deviceQUALCOMM INC·Filed 2013·Granted Dec 29, 2015·5 cites·51 claims
Showing the top 50 of 106 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →