Inventor · disambiguated record
Jung-Chou Tsai
Also filed as: TSAI JUNG-CHOU
7 granted patents·2 pending applications·4 citations·filing 2019–2023
76Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD9
Top patents by PatentIndex Score
9 records- 0194US12002776B2Interconnect structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 4, 2024·2 cites·20 claims
- 0288US11532580B2Interconnect structure, semiconductor structure including interconnect structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 20, 2022·2 cites·20 claims
- 0380US12277379B2Method and system for generating layout diagram including wiring arrangementTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Apr 15, 2025·0 cites·20 claims
- 0479US12216981B2System and method for generating layout diagram including wiring arrangementTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Feb 4, 2025·0 cites·20 claims
- 0575US11790151B2System for generating layout diagram including wiring arrangementTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Oct 17, 2023·0 cites·20 claims
- 0671US2024095439A1Devices with track-based fill (tbf) metal patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 0767US2023142853A1Devices with track-based fill (tbf) metal patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 0864US11775727B2Method for generating layout diagram including wiring arrangementTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Oct 3, 2023·0 cites·20 claims
- 0961US11556691B2Track-based fill (TBF) method for metal patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jan 17, 2023·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →