Inventor · disambiguated record
Juan Antonio Yanes
Also filed as: YANES JUAN A · YANES JUAN ANTONIO
16 granted patents·1 pending application·238 citations·filing 1997–2015
94Inventor score
Top patents by PatentIndex Score
17 records- 0184US9811474B2Determining cache performance using a ghost cache list indicating tracks demoted from a cache list of tracks in a cacheIBM·Filed 2015·Granted Nov 7, 2017·4 cites·20 claims
- 0277US6530043B1Write data error checking in a PCI Bus systemIBM·Filed 2000·Granted Mar 4, 2003·24 cites·15 claims
- 0372US6490644B1Limiting write data fracturing in PCI bus systemsIBM·Filed 2000·Granted Dec 3, 2002·18 cites·15 claims
- 0469US8138625B2Dual line active automatic transfer switchDUAN JIWU·Filed 2009·Granted Mar 20, 2012·11 cites·18 claims
- 0566US6636913B1Data length control of access to a data busIBM·Filed 2000·Granted Oct 21, 2003·12 cites·18 claims
- 0663US6535937B1Write command verification across a PCI bus systemIBM·Filed 2000·Granted Mar 18, 2003·10 cites·21 claims
- 0763US6084934ANatural throttling of data transfer across asynchronous boundariesIBM·Filed 1997·Granted Jul 4, 2000·52 cites·9 claims
- 0853US6557087B1Management of PCI read access to a central resourceIBM·Filed 2000·Granted Apr 29, 2003·4 cites·21 claims
- 0953US6246726B1High speed digital data transmission by separately clocking and recombining interleaved data subgroupsIBM·Filed 2000·Granted Jun 12, 2001·2 cites·12 claims
- 1048US5944802ADynamic speed matching of host channel and device data transfersIBM·Filed 1997·Granted Aug 31, 1999·22 cites·18 claims
- 1147US6189117B1Error handling between a processor and a system managed by the processorIBM·Filed 1998·Granted Feb 13, 2001·20 cites·31 claims
- 1245US6085285AIntermixing different devices along a single data communication link by placing a strobe signal in a parity bit slotIBM·Filed 1997·Granted Jul 4, 2000·17 cites·22 claims
- 1344US6038613APrefetching and storing device work information from multiple data storage devicesIBM·Filed 1997·Granted Mar 14, 2000·17 cites·30 claims
- 1443US2008028141A1System and Method for Implementing Hard Disk Drive Data Clear and PurgeKALOS MATTHEW J·Filed 2006·Application pending·0 cites
- 1540US6449678B1Method and system for multiple read/write transactions across a bridge systemIBM·Filed 1999·Granted Sep 10, 2002·14 cites·30 claims
- 1637US5928375AMethod for enhancing data transmission in parity based data processing systemsIBM·Filed 1997·Granted Jul 27, 1999·9 cites·15 claims
- 1731US6091783AHigh speed digital data transmission by separately clocking and recombining interleaved data subgroupsIBM·Filed 1997·Granted Jul 18, 2000·2 cites·36 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →