Inventor · disambiguated record
Kalyan Doddapaneni
Also filed as: DODDAPANENI KALYAN
11 granted patents·64 citations·filing 2003–2009
88Inventor score
Top patents by PatentIndex Score
11 records- 0182US8350375B2Flipchip bump patterns for efficient I-mesh power distribution schemesLSI LOGIC CORP·Filed 2008·Granted Jan 8, 2013·11 cites·20 claims
- 0276US7554133B1Pad current splittingLSI CORP·Filed 2008·Granted Jun 30, 2009·8 cites·15 claims
- 0373US6798069B1Integrated circuit having adaptable core and input/output regions with multi-layer pad trace conductorsLSI LOGIC CORP·Filed 2003·Granted Sep 28, 2004·22 cites·31 claims
- 0470US7863716B2Method and apparatus of power ring positioning to minimize crosstalkLSI CORP·Filed 2009·Granted Jan 4, 2011·4 cites·6 claims
- 0570US7569472B2Method and apparatus of power ring positioning to minimize crosstalkLSI CORP·Filed 2006·Granted Aug 4, 2009·4 cites·7 claims
- 0664US8115321B2Separate probe and bond regions of an integrated circuitALI ANWAR·Filed 2009·Granted Feb 14, 2012·4 cites·20 claims
- 0753US8151237B2Disabling unused IO resources in platform-based integrated circuitsALI ANWAR·Filed 2008·Granted Apr 3, 2012·2 cites·21 claims
- 0852US7075179B1System for implementing a configurable integrated circuitLSI LOGIC CORP·Filed 2004·Granted Jul 11, 2006·6 cites·10 claims
- 0948US7328417B2Cell-based method for creating slotted metal in semiconductor designsLSI LOGIC CORP·Filed 2003·Granted Feb 5, 2008·1 cites·38 claims
- 1042US7430730B2Disabling unused IO resources in platform-based integrated circuitsLSI CORP·Filed 2004·Granted Sep 30, 2008·2 cites·8 claims
- 1140US7737564B2Power configuration method for structured ASICsLSI CORP·Filed 2006·Granted Jun 15, 2010·0 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →