Inventor · disambiguated record
Karthik Jambunathan
Also filed as: JAMBUNATHAN KARTHIK
43 granted patents·5 pending applications·56 citations·filing 2014–2022
96Inventor score
Top patents by PatentIndex Score
48 records- 0195US10734412B2Backside contact resistance reduction for semiconductor devices with metallization on both sidesINTEL CORP·Filed 2016·Granted Aug 4, 2020·15 cites·20 claims
- 0293US11222977B2Source/drain diffusion barrier for germanium NMOS transistorsINTEL CORP·Filed 2017·Granted Jan 11, 2022·8 cites·22 claims
- 0388US10373977B2Transistor fin formation via cladding on sacrificial coreINTEL CORP·Filed 2015·Granted Aug 6, 2019·6 cites·20 claims
- 0484US10672868B2Methods of forming self aligned spacers for nanowire device structuresINTEL CORP·Filed 2015·Granted Jun 2, 2020·4 cites·21 claims
- 0584US10418464B2Techniques for forming transistors on the same die with varied channel materialsINTEL CORP·Filed 2015·Granted Sep 17, 2019·4 cites·19 claims
- 0684US9997414B2Ge/SiGe-channel and III-V-channel transistors on the same dieINTEL CORP·Filed 2014·Granted Jun 12, 2018·5 cites·25 claims
- 0783US11444166B2Backside source/drain replacement for semiconductor devices with metallization on both sidesINTEL CORP·Filed 2020·Granted Sep 13, 2022·1 cites·20 claims
- 0880US11251302B2Epitaxial oxide plug for strained transistorsINTEL CORP·Filed 2017·Granted Feb 15, 2022·2 cites·20 claims
- 0977US10892337B2Backside source/drain replacement for semiconductor devices with metallization on both sidesINTEL CORP·Filed 2016·Granted Jan 12, 2021·2 cites·20 claims
- 1076US10573750B2Methods of forming doped source/drain contacts and structures formed therebyINTEL CORP·Filed 2015·Granted Feb 25, 2020·2 cites·21 claims
- 1173US11101268B2Transistors employing non-selective deposition of source/drain materialINTEL CORP·Filed 2017·Granted Aug 24, 2021·2 cites·18 claims
- 1271US11699756B2Source/drain diffusion barrier for germanium nMOS transistorsINTEL CORP·Filed 2021·Granted Jul 11, 2023·0 cites·20 claims
- 1369US12419091B2Source electrode and drain electrode protection for nanowire transistorsINTEL CORP·Filed 2022·Granted Sep 16, 2025·0 cites·16 claims
- 1469US11757037B2Epitaxial oxide plug for strained transistorsINTEL CORP·Filed 2022·Granted Sep 12, 2023·0 cites·20 claims
- 1569US11069795B2Transistors with channel and sub-channel regions with distinct compositions and dimensionsINTEL CORP·Filed 2017·Granted Jul 20, 2021·1 cites·20 claims
- 1669US11056592B2Silicon substrate modification to enable formation of thin, relaxed, germanium-based layerINTEL CORP·Filed 2017·Granted Jul 6, 2021·1 cites·20 claims
- 1768US11735670B2Non-selective epitaxial source/drain deposition to reduce dopant diffusion for germanium NMOS transistorsINTEL CORP·Filed 2021·Granted Aug 22, 2023·0 cites·20 claims
- 1866US10483353B2Transistor including tensile-strained germanium channelINTEL CORP·Filed 2015·Granted Nov 19, 2019·1 cites·19 claims
- 1966US10403752B2Prevention of subchannel leakage current in a semiconductor device with a fin structureINTEL CORP·Filed 2014·Granted Sep 3, 2019·1 cites·18 claims
- 2065US11101350B2Integrated circuit with germanium-rich channel transistors including one or more dopant diffusion barrier elementsINTEL CORP·Filed 2020·Granted Aug 24, 2021·0 cites·19 claims
- 2164US10879241B2Techniques for controlling transistor sub-fin leakageINTEL CORP·Filed 2015·Granted Dec 29, 2020·1 cites·18 claims
- 2260US11004978B2Methods of forming doped source/drain contacts and structures formed therebyINTEL CORP·Filed 2020·Granted May 11, 2021·0 cites·19 claims
- 2356US10692973B2Germanium-rich channel transistors including one or more dopant diffusion barrier elementsINTEL CORP·Filed 2017·Granted Jun 23, 2020·0 cites·20 claims
- 2454US11189730B2Non-selective epitaxial source/drain deposition to reduce dopant diffusion for germanium nMOS transistorsINTEL CORP·Filed 2017·Granted Nov 30, 2021·0 cites·20 claims
- 2553US11411096B2Source electrode and drain electrode protection for nanowire transistorsINTEL CORP·Filed 2017·Granted Aug 9, 2022·0 cites·25 claims
- 2650US2023207317A1Strain compensation via ion implantation in relaxed buffer layer to prevent wafer bowINTEL CORP·Filed 2021·Application pending·0 cites
- 2748US11081570B2Transistors with lattice matched gate structureINTEL CORP·Filed 2016·Granted Aug 3, 2021·0 cites·20 claims
- 2848US11011620B2Techniques for increasing channel region tensile strain in n-MOS devicesINTEL CORP·Filed 2016·Granted May 18, 2021·0 cites·20 claims
- 2948US10944006B2Geometry tuning of fin based transistorINTEL CORP·Filed 2016·Granted Mar 9, 2021·0 cites·21 claims
- 3047US11482457B2Substrate defect blocking layers for strained channel semiconductor devicesINTEL CORP·Filed 2017·Granted Oct 25, 2022·0 cites·21 claims
- 3147US11121030B2Transistors employing carbon-based etch stop layer for preserving source/drain material during contact trench etchINTEL CORP·Filed 2017·Granted Sep 14, 2021·0 cites·19 claims
- 3247US10559689B2Crystallized silicon carbon replacement material for NMOS source/drain regionsINTEL CORP·Filed 2015·Granted Feb 11, 2020·0 cites·18 claims
- 3347US2022384704A1Integration scheme for shunted josephson junctionsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Application pending·0 cites
- 3446US11430787B2Forming crystalline source/drain contacts on semiconductor devicesINTEL CORP·Filed 2017·Granted Aug 30, 2022·0 cites·20 claims
- 3546US11101356B2Doped insulator cap to reduce source/drain diffusion for germanium NMOS transistorsINTEL CORP·Filed 2017·Granted Aug 24, 2021·0 cites·20 claims
- 3646US11004954B2Epitaxial buffer to reduce sub-channel leakage in MOS transistorsINTEL CORP·Filed 2016·Granted May 11, 2021·0 cites·19 claims
- 3744US11538905B2Nanowire transistors employing carbon-based layersINTEL CORP·Filed 2016·Granted Dec 27, 2022·0 cites·20 claims
- 3844US10749032B2Techniques for forming transistors including group III-V material nanowires using sacrificial group IV material layersINTEL CORP·Filed 2016·Granted Aug 18, 2020·0 cites·20 claims
- 3944US10516021B2Reduced leakage transistors with germanium-rich channel regionsINTEL CORP·Filed 2015·Granted Dec 24, 2019·0 cites·20 claims
- 4042US11404575B2Diverse transistor channel materials enabled by thin, inverse-graded, germanium-based layerINTEL CORP·Filed 2017·Granted Aug 2, 2022·0 cites·20 claims
- 4141US11588017B2Nanowire for transistor integrationINTEL CORP·Filed 2016·Granted Feb 21, 2023·0 cites·23 claims
- 4241US11264501B2Device, method and system for promoting channel stress in a NMOS transistorINTEL CORP·Filed 2017·Granted Mar 1, 2022·0 cites·16 claims
- 4340US11024737B2Etching fin core to provide fin doublingINTEL CORP·Filed 2016·Granted Jun 1, 2021·0 cites·20 claims
- 4438US11335600B2Integration method for finfet with tightly controlled multiple fin heightsINTEL CORP·Filed 2015·Granted May 17, 2022·0 cites·22 claims
- 4536US10510848B2Sub-fin sidewall passivation in replacement channel FinFETSINTEL CORP·Filed 2015·Granted Dec 17, 2019·0 cites·20 claims
- 4635US2018151733A1Carbon-based interface for epitaxially grown source/drain transistor regionsINTEL CORP·Filed 2015·Application pending·0 cites
- 4734US2018151732A1Resistance reduction in transistors having epitaxially grown source/drain regionsINTEL CORP·Filed 2015·Application pending·0 cites
- 4834US2020161440A1Metal to source/drain contact area using thin nucleation layer and sacrificial epitaxial filmINTEL CORP·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →