Inventor · disambiguated record
Katsunao Kanari
Also filed as: KANARI KATSUNAO
7 granted patents·26 citations·filing 2004–2012
79Inventor score
Top patents by PatentIndex Score
7 records- 0183US7961547B2Memory device using a common write word line and a common read bit lineFUJITSU LTD·Filed 2010·Granted Jun 14, 2011·10 cites·5 claims
- 0274US7817492B2Memory device using SRAM circuitFUJITSU LTD·Filed 2008·Granted Oct 19, 2010·9 cites·5 claims
- 0364US8185855B2Capacitor-cell, integrated circuit, and designing and manufacturing methodsKANARI KATSUNAO·Filed 2009·Granted May 22, 2012·4 cites·5 claims
- 0449US8151152B2Latch circuit including data input terminal and scan data input terminal, and semiconductor device and control methodKANARI KATSUNAO·Filed 2009·Granted Apr 3, 2012·2 cites·9 claims
- 0543US7310011B2Clock signal adjuster circuitFUJITSU LTD·Filed 2005·Granted Dec 18, 2007·1 cites·7 claims
- 0635US7449731B2Semiconductor gate circuit and delay circuit comprising series connected CMOS transistorsFUJITSU LTD·Filed 2004·Granted Nov 11, 2008·0 cites·10 claims
- 0731US9018981B2Latch circuit and clock control circuitKANARI KATSUNAO·Filed 2012·Granted Apr 28, 2015·0 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →