Inventor · disambiguated record
Kai-Yun Lin
Also filed as: LIN KAI-YUN
7 granted patents·1 pending application·46 citations·filing 2008–2023
84Inventor score
Top patents by PatentIndex Score
8 records- 0192US11675957B2Integrated circuit stack verification method and system for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jun 13, 2023·2 cites·20 claims
- 0290US11387177B2Package structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jul 12, 2022·8 cites·20 claims
- 0389US11023647B2Integrated circuit stack verification method and system for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jun 1, 2021·4 cites·20 claims
- 0486US9922160B2Integrated circuit stack verification method and system for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Mar 20, 2018·4 cites·20 claims
- 0586US8359554B2Verification of 3D integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2011·Granted Jan 22, 2013·10 cites·20 claims
- 0686US8060843B2Verification of 3D integrated circuitsWANG CHUNG-HSING·Filed 2008·Granted Nov 15, 2011·18 cites·20 claims
- 0781US12293141B2Integrated circuit stack verification method and system for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted May 6, 2025·0 cites·20 claims
- 0862US2022246509A1Package structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →