Inventor · disambiguated record
Katherine L. Saenger
Also filed as: COOPER EMANUEL I · HUANG ELBERT · PURUSHOTHAMAN SAMPATH · SAENGER KATHERINE
157 granted patents·28 pending applications·6,111 citations·filing 1993–2019
99Inventor score
Top patents by PatentIndex Score
185 records- 0199US7923337B2Fin field effect transistor devices with self-aligned source and drain regionsIBM·Filed 2007·Granted Apr 12, 2011·234 cites·19 claims
- 0299US7795677B2Nanowire field-effect transistorsIBM·Filed 2007·Granted Sep 14, 2010·146 cites·22 claims
- 0399US6413852B1Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder materialIBM·Filed 2000·Granted Jul 2, 2002·264 cites·25 claims
- 0499US5433651AIn-situ endpoint detection and process monitoring method and apparatus for chemical-mechanical polishingIBM·Filed 1993·Granted Jul 18, 1995·758 cites·51 claims
- 0598US7060585B1Hybrid orientation substrates by in-place bonding and amorphization/templated recrystallizationIBM·Filed 2005·Granted Jun 13, 2006·75 cites·19 claims
- 0698US6774010B2Transferable device-containing layer for silicon-on-insulator applicationsIBM·Filed 2001·Granted Aug 10, 2004·376 cites·30 claims
- 0798US6184121B1Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the sameIBM·Filed 1998·Granted Feb 6, 2001·369 cites·39 claims
- 0898US6140226ADual damascene processing for semiconductor chip interconnectsIBM·Filed 1998·Granted Oct 31, 2000·363 cites·48 claims
- 0998US5789320APlating of noble metal electrodes for DRAM and FRAMIBM·Filed 1996·Granted Aug 4, 1998·326 cites·29 claims
- 1097US8486776B2Strained devices, methods of manufacture and design structuresBEDELL STEPHEN W·Filed 2010·Granted Jul 16, 2013·29 cites·20 claims
- 1197US7968459B2Ion implantation combined with in situ or ex situ heat treatment for improved field effect transistorsIBM·Filed 2008·Granted Jun 28, 2011·104 cites·21 claims
- 1297US7547616B2Laser processing method for trench-edge-defect-free solid phase epitaxy in confined geometricsIBM·Filed 2006·Granted Jun 16, 2009·30 cites·1 claims
- 1396US7534675B2Techniques for fabricating nanowire field-effect transistorsINTERNAT BUSINESS MACHIENS COR·Filed 2007·Granted May 19, 2009·53 cites·13 claims
- 1496US7125785B2Mixed orientation and mixed material semiconductor-on-insulator waferIBM·Filed 2004·Granted Oct 24, 2006·102 cites·11 claims
- 1596US7112851B2Field effect transistor with electroplated metal gateIBM·Filed 2005·Granted Sep 26, 2006·36 cites·20 claims
- 1696US6448176B1Dual damascene processing for semiconductor chip interconnectsIBM·Filed 2000·Granted Sep 10, 2002·102 cites·5 claims
- 1796US6096590AScalable MOS field effect transistorIBM·Filed 1998·Granted Aug 1, 2000·184 cites·37 claims
- 1895US8785911B2Graphene or carbon nanotube devices with localized bottom gates and gate dielectricCHEN ZHIHONG·Filed 2011·Granted Jul 22, 2014·25 cites·24 claims
- 1995US8030145B2Back-gated fully depleted SOI transistorIBM·Filed 2010·Granted Oct 4, 2011·23 cites·21 claims
- 2095US7534696B2Multilayer interconnect structure containing air gaps and method for makingIBM·Filed 2006·Granted May 19, 2009·42 cites·13 claims
- 2195US7309649B2Method of forming closed air gap interconnects and structures formed therebyIBM·Filed 2006·Granted Dec 18, 2007·33 cites·15 claims
- 2295US6975032B2Copper recess process with application to selective capping and electroless platingIBM·Filed 2002·Granted Dec 13, 2005·85 cites·19 claims
- 2395US6815329B2Multilayer interconnect structure containing air gaps and method for makingIBM·Filed 2002·Granted Nov 9, 2004·105 cites·13 claims
- 2494US9455179B1Methods to reduce debonding forces on flexible semiconductor films disposed on vapor-releasing adhesivesIBM·Filed 2015·Granted Sep 27, 2016·8 cites·20 claims
- 2594US9102118B2Forming patterned graphene layersAFZALI-ARDAKANI ALI·Filed 2011·Granted Aug 11, 2015·13 cites·23 claims
- 2694US7393776B2Method of forming closed air gap interconnects and structures formed therebyIBM·Filed 2006·Granted Jul 1, 2008·26 cites·6 claims
- 2794US7361991B2Closed air gap interconnect structureIBM·Filed 2003·Granted Apr 22, 2008·67 cites·11 claims
- 2894US6346484B1Method for selective extraction of sacrificial place-holding material used in fabrication of air gap-containing interconnect structuresIBM·Filed 2000·Granted Feb 12, 2002·80 cites·12 claims
- 2994US6265779B1Method and material for integration of fuorine-containing low-k dielectricsIBM·Filed 1998·Granted Jul 24, 2001·139 cites·18 claims
- 3094US6172385B1Multilayer ferroelectric capacitor structureIBM·Filed 1998·Granted Jan 9, 2001·155 cites·15 claims
- 3193US8828762B2Carbon nanostructure device fabrication utilizing protect layersIBM·Filed 2012·Granted Sep 9, 2014·10 cites·14 claims
- 3293US8574969B2CMOS with channel P-FinFET and channel N-FinFET having different crystalline orientations and parallel finsCOHEN GUY M·Filed 2012·Granted Nov 5, 2013·11 cites·4 claims
- 3393US6737725B2Multilevel interconnect structure containing air gaps and method for makingIBM·Filed 2002·Granted May 18, 2004·70 cites·12 claims
- 3493US6577011B1Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the sameIBM·Filed 2000·Granted Jun 10, 2003·86 cites·16 claims
- 3592US9496165B1Method of forming a flexible semiconductor layer and devices on a flexible carrierIBM·Filed 2015·Granted Nov 15, 2016·6 cites·19 claims
- 3692US8927057B2Graphene formation utilizing solid phase carbon sourcesBOL AGEETH A·Filed 2010·Granted Jan 6, 2015·14 cites·13 claims
- 3792US7525162B2Orientation-optimized PFETS in CMOS devices employing dual stress linersIBM·Filed 2007·Granted Apr 28, 2009·24 cites·21 claims
- 3892US7064064B2Copper recess process with application to selective capping and electroless platingIBM·Filed 2005·Granted Jun 20, 2006·22 cites·10 claims
- 3992US6740535B2Enhanced T-gate structure for modulation doped field effect transistorsIBM·Filed 2002·Granted May 25, 2004·53 cites·17 claims
- 4091US8592280B2Fin field effect transistor devices with self-aligned source and drain regionsCHANG JOSEPHINE B·Filed 2009·Granted Nov 26, 2013·15 cites·10 claims
- 4191US7071122B2Field effect transistor with etched-back gate dielectricIBM·Filed 2003·Granted Jul 4, 2006·42 cites·16 claims
- 4290US8084319B2Precisely tuning feature sizes on hard masks via plasma treatmentPENG HONGBO·Filed 2010·Granted Dec 27, 2011·11 cites·21 claims
- 4390US6967131B2Field effect transistor with electroplated metal gateIBM·Filed 2003·Granted Nov 22, 2005·43 cites·22 claims
- 4489US9705013B2Crack-tolerant photovoltaic cell structure and fabrication methodIBM·Filed 2015·Granted Jul 11, 2017·5 cites·16 claims
- 4589US5869880AStructure and fabrication method for stackable, air-gap-containing low epsilon dielectric layersIBM·Filed 1996·Granted Feb 9, 1999·108 cites·13 claims
- 4688US8890261B2Fin field effect transistor devices with self-aligned source and drain regionsIBM·Filed 2013·Granted Nov 18, 2014·7 cites·10 claims
- 4788US8723233B2CMOS with channel P-FinFET and channel N-FinFET having different crystalline orientations and parallel finsIBM·Filed 2013·Granted May 13, 2014·5 cites·6 claims
- 4888US7868410B2Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flowIBM·Filed 2008·Granted Jan 11, 2011·13 cites·7 claims
- 4988US7667278B2Metal carbide gate structure and method of fabricationIBM·Filed 2006·Granted Feb 23, 2010·11 cites·13 claims
- 5088US7098476B2Multilayer interconnect structure containing air gaps and method for makingIBM·Filed 2004·Granted Aug 29, 2006·39 cites·4 claims
Showing the top 50 of 185 patent records by PatentIndex Score.
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