Inventor · disambiguated record
Keith Alan Bowman
Also filed as: BOWMAN KEITH · BOWMAN KEITH A · BOWMAN KEITH ALAN
41 granted patents·4 pending applications·211 citations·filing 2007–2023
97Inventor score
Top patents by PatentIndex Score
45 records- 0197US11424736B1Adaptive clock duty-cycle controllerQUALCOMM INC·Filed 2021·Granted Aug 23, 2022·14 cites·31 claims
- 0296US11249530B1Adaptive voltage controllerQUALCOMM INC·Filed 2020·Granted Feb 15, 2022·14 cites·24 claims
- 0395US9628089B1Supply voltage tracking clock generator in adaptive clock distribution systemsQUALCOMM INC·Filed 2016·Granted Apr 18, 2017·23 cites·27 claims
- 0494US11398812B1Adaptive clock duty-cycle controllerQUALCOMM INC·Filed 2021·Granted Jul 26, 2022·4 cites·18 claims
- 0594US10587253B1Ring oscillator-based programmable delay lineQUALCOMM INC·Filed 2018·Granted Mar 10, 2020·16 cites·26 claims
- 0694US10009016B1Dynamically adaptive voltage-frequency guardband control circuitQUALCOMM INC·Filed 2016·Granted Jun 26, 2018·26 cites·22 claims
- 0794US9413344B2Automatic calibration circuits for operational calibration of critical-path time delays in adaptive clock distribution systems, and related methods and systemsQUALCOMM INC·Filed 2015·Granted Aug 9, 2016·21 cites·29 claims
- 0892US11855645B2Adaptive clock duty-cycle controllerQUALCOMM INC·Filed 2021·Granted Dec 26, 2023·3 cites·24 claims
- 0990US11493980B1Power controller communication latency mitigationQUALCOMM INC·Filed 2021·Granted Nov 8, 2022·3 cites·26 claims
- 1090US9251875B1Register file circuit and method for improving the minimum operating supply voltageQUALCOMM INC·Filed 2014·Granted Feb 2, 2016·16 cites·30 claims
- 1188US9940992B2Leakage-aware activation control of a delayed keeper circuit for a dynamic read operation in a memory bit cellQUALCOMM INC·Filed 2016·Granted Apr 10, 2018·9 cites·27 claims
- 1288US9842634B2Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methodsQUALCOMM INC·Filed 2015·Granted Dec 12, 2017·7 cites·28 claims
- 1387US9625924B2Leakage current supply circuit for reducing low drop-out voltage regulator headroomQUALCOMM INC·Filed 2015·Granted Apr 18, 2017·6 cites·25 claims
- 1484US12224752B1Clock gating circuit for dual-edge-triggered flip-flopsQUALCOMM INC·Filed 2023·Granted Feb 11, 2025·1 cites·22 claims
- 1584US9741452B2Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methodsQUALCOMM INC·Filed 2015·Granted Aug 22, 2017·6 cites·27 claims
- 1681US10024916B2Sequential circuit with error detectionINTEL CORP·Filed 2017·Granted Jul 17, 2018·2 cites·20 claims
- 1781US9229054B2Self-contained, path-level aging monitor apparatus and methodBOWMAN KEITH A·Filed 2011·Granted Jan 5, 2016·8 cites·17 claims
- 1878US9330785B1Read operation based aging sensor for static random access memory (SRAM)QUALCOMM INC·Filed 2015·Granted May 3, 2016·5 cites·30 claims
- 1978US7653850B2Delay fault detection using latch with error samplingINTEL CORP·Filed 2007·Granted Jan 26, 2010·8 cites·10 claims
- 2076US11264976B2Symmetrically-interconnected tunable time delay circuitQUALCOMM INC·Filed 2020·Granted Mar 1, 2022·1 cites·13 claims
- 2172US12489430B2Lock-up latch for dual-edge-triggered flip-flopsQUALCOMM INC·Filed 2023·Granted Dec 2, 2025·0 cites·13 claims
- 2270US8301970B2Sequential circuit with error detectionBOWMAN KEITH·Filed 2008·Granted Oct 30, 2012·9 cites·18 claims
- 2366US10622043B2Multi-pump memory system access circuits for sequentially executing parallel memory operationsQUALCOMM INC·Filed 2018·Granted Apr 14, 2020·2 cites·27 claims
- 2465US10224084B2Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methodsQUALCOMM INC·Filed 2017·Granted Mar 5, 2019·1 cites·25 claims
- 2563US10163490B2P-type field-effect transistor (PFET)-based sense amplifiers for reading PFET pass-gate memory bit cells, and related memory systems and methodsQUALCOMM INC·Filed 2015·Granted Dec 25, 2018·2 cites·31 claims
- 2661US10026456B2Bitline positive boost write-assist circuits for memory bit cells employing a P-type Field-Effect transistor (PFET) write port(s), and related systems and methodsQUALCOMM INC·Filed 2015·Granted Jul 17, 2018·1 cites·35 claims
- 2761US9984730B2Negative supply rail positive boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methodsQUALCOMM INC·Filed 2015·Granted May 29, 2018·1 cites·28 claims
- 2861US9915968B2Systems and methods for adaptive clock designQUALCOMM INC·Filed 2016·Granted Mar 13, 2018·1 cites·28 claims
- 2960US9772903B2Resilient register file circuit for dynamic variation tolerance and method of operating the sameINTEL CORP·Filed 2016·Granted Sep 26, 2017·1 cites·17 claims
- 3059US11270761B2Dual-mode high-bandwidth SRAM with self-timed clock circuitQUALCOMM INC·Filed 2021·Granted Mar 8, 2022·0 cites·9 claims
- 3156US9594625B2Sequential circuit with error detectionINTEL CORP·Filed 2015·Granted Mar 14, 2017·0 cites·20 claims
- 3255US2025192784A1Dual-edge-triggered flip-flops including scan, reset, and data retention featuresQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3352US9329918B2Resilient register file circuit for dynamic variation tolerance and method of operating the sameKULKARNI JAYDEEP P·Filed 2011·Granted May 3, 2016·0 cites·12 claims
- 3452US9189014B2Sequential circuit with error detectionBOWMAN KEITH A·Filed 2012·Granted Nov 17, 2015·0 cites·20 claims
- 3550US10978139B2Dual-mode high-bandwidth SRAM with self-timed clock circuitQUALCOMM INC·Filed 2019·Granted Apr 13, 2021·0 cites·11 claims
- 3650US10424392B2Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methodsQUALCOMM INC·Filed 2018·Granted Sep 24, 2019·0 cites·29 claims
- 3748US11880454B2On-die voltage-frequency security monitorQUALCOMM INC·Filed 2020·Granted Jan 23, 2024·0 cites·20 claims
- 3847US10115481B2Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methodsQUALCOMM INC·Filed 2017·Granted Oct 30, 2018·0 cites·30 claims
- 3944US10658029B2High bandwidth double-pumped memoryQUALCOMM INC·Filed 2018·Granted May 19, 2020·0 cites·19 claims
- 4038US11031075B2High bandwidth register file circuit with high port counts for reduced bitline delayQUALCOMM INC·Filed 2019·Granted Jun 8, 2021·0 cites·24 claims
- 4138US10394471B2Adaptive power regulation methods and systemsQUALCOMM INC·Filed 2016·Granted Aug 27, 2019·0 cites·27 claims
- 4237US2017090508A1Method and apparatus for effective clock scaling at exposed cache stallsQUALCOMM INC·Filed 2015·Application pending·0 cites
- 4336US2016267214A1Clock tree design methods for ultra-wide voltage range circuitsQUALCOMM INC·Filed 2015·Application pending·0 cites
- 4433US2018137929A1Wear sensor and method of operation for a memory deviceQUALCOMM INC·Filed 2016·Application pending·0 cites
- 4531US9947406B2Dynamic tag compare circuits employing P-type field-effect transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and related systems and methodsQUALCOMM INC·Filed 2015·Granted Apr 17, 2018·0 cites·42 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →