Inventor · disambiguated record
Kenneth C. Creta
Also filed as: CRETA KENNETH · CRETA KENNETH C
37 granted patents·10 pending applications·945 citations·filing 1994–2024
98Inventor score
Top patents by PatentIndex Score
47 records- 0196US6681292B2Distributed read and write caching implementation for optimized input/output applicationsINTEL CORP·Filed 2001·Granted Jan 20, 2004·294 cites·30 claims
- 0291US6216247B132-bit mode for a 64-bit ECC capable memory subsystemINTEL CORP·Filed 1998·Granted Apr 10, 2001·179 cites·18 claims
- 0388US7210000B2Transmitting peer-to-peer transactions through a coherent interfaceINTEL CORP·Filed 2004·Granted Apr 24, 2007·51 cites·29 claims
- 0487US9575895B2Providing common caching agent for core and integrated input/output (IO) moduleINTEL CORP·Filed 2015·Granted Feb 21, 2017·5 cites·17 claims
- 0581US12405904B2Sharing memory and I/O services between nodesINTEL CORP·Filed 2024·Granted Sep 2, 2025·0 cites·20 claims
- 0680US10915468B2Sharing memory and I/O services between nodesINTEL CORP·Filed 2013·Granted Feb 9, 2021·4 cites·25 claims
- 0780US8984228B2Providing common caching agent for core and integrated input/output (IO) moduleLIU YEN-CHENG·Filed 2011·Granted Mar 17, 2015·5 cites·19 claims
- 0880US8046539B2Method and apparatus for the synchronization of distributed cachesINTEL CORP·Filed 2009·Granted Oct 25, 2011·9 cites·30 claims
- 0980US6978351B2Method and system to improve prefetching operationsINTEL CORP·Filed 2002·Granted Dec 20, 2005·27 cites·27 claims
- 1080US6088762APower failure mode for a memory controllerINTEL CORP·Filed 1998·Granted Jul 11, 2000·44 cites·13 claims
- 1179US8347011B2Stream priorityINTEL CORP·Filed 2011·Granted Jan 1, 2013·4 cites·15 claims
- 1279US7165131B2Separating transactions into different virtual channelsINTEL CORP·Filed 2004·Granted Jan 16, 2007·25 cites·26 claims
- 1379US7124252B1Method and apparatus for pipelining ordered input/output transactions to coherent memory in a distributed memory, cache coherent, multi-processor systemINTEL CORP·Filed 2000·Granted Oct 17, 2006·28 cites·26 claims
- 1477US7184399B2Method for handling completion packets with a non-successful completion statusINTEL CORP·Filed 2001·Granted Feb 27, 2007·25 cites·18 claims
- 1576US6976115B2Peer-to-peer bus segment bridgingINTEL CORP·Filed 2002·Granted Dec 13, 2005·22 cites·26 claims
- 1673US6694383B2Handling service requestsINTEL CORP·Filed 2001·Granted Feb 17, 2004·16 cites·24 claims
- 1771US7996572B2Multi-node chipset lock flow with peer-to-peer non-posted I/O requestsINTEL CORP·Filed 2004·Granted Aug 9, 2011·16 cites·30 claims
- 1871US5742831AMethods and apparatus for maintaining cache coherency during copendency of load and store operationsINTEL CORP·Filed 1994·Granted Apr 21, 1998·52 cites·39 claims
- 1970US8205026B2Stream priorityFUTRAL WILLIAM T·Filed 2011·Granted Jun 19, 2012·2 cites·8 claims
- 2070US7206865B2Apparatus and method for combining writes to I/OINTEL CORP·Filed 2003·Granted Apr 17, 2007·15 cites·19 claims
- 2169US6859864B2Mechanism for initiating an implicit write-back in response to a read or snoop of a modified cache lineINTEL CORP·Filed 2000·Granted Feb 22, 2005·14 cites·19 claims
- 2269US6801976B2Mechanism for preserving producer-consumer ordering across an unordered interfaceINTEL CORP·Filed 2001·Granted Oct 5, 2004·17 cites·22 claims
- 2369US2022012189A1Sharing memory and i/o services between nodesINTEL CORP·Filed 2021·Application pending·0 cites
- 2467US7546422B2Method and apparatus for the synchronization of distributed cachesINTEL CORP·Filed 2002·Granted Jun 9, 2009·12 cites·16 claims
- 2567US7353301B2Methodology and apparatus for implementing write combiningINTEL CORP·Filed 2004·Granted Apr 1, 2008·10 cites·26 claims
- 2666US6915365B2Mechanism for PCI I/O-initiated configuration cyclesINTEL CORP·Filed 2002·Granted Jul 5, 2005·18 cites·27 claims
- 2765US8468278B2Methods and apparatuses for flushing write-combined data from a bufferRADHAKRISHNAN SIVAKUMAR·Filed 2007·Granted Jun 18, 2013·3 cites·8 claims
- 2865US7089362B2Cache memory eviction policy for combining write transactionsINTEL CORP·Filed 2001·Granted Aug 8, 2006·11 cites·22 claims
- 2963US8412855B2Write combining protocol between processors and chipsetsCRETA KENNETH C·Filed 2010·Granted Apr 2, 2013·2 cites·17 claims
- 3062US7162546B2Reordering unrelated transactions from an ordered interfaceINTEL CORP·Filed 2001·Granted Jan 9, 2007·9 cites·15 claims
- 3160US7676603B2Write combining protocol between processors and chipsetsINTEL CORP·Filed 2004·Granted Mar 9, 2010·6 cites·28 claims
- 3258US8006017B2Stream priorityINTEL CORP·Filed 2004·Granted Aug 23, 2011·4 cites·22 claims
- 3357US6976129B2Mechanism for handling I/O transactions with known transaction length to coherent memory in a cache coherent multi-node architectureINTEL CORP·Filed 2002·Granted Dec 13, 2005·5 cites·21 claims
- 3455US8347018B2Techniques for broadcasting messages on a point-to-point interconnectINTEL CORP·Filed 2009·Granted Jan 1, 2013·0 cites·21 claims
- 3555US7000041B2Method and an apparatus to efficiently handle read completions that satisfy a read requestINTEL CORP·Filed 2003·Granted Feb 14, 2006·6 cites·9 claims
- 3654US7363393B2Chipset feature detection and configuration by an I/O deviceINTEL CORP·Filed 2003·Granted Apr 22, 2008·3 cites·28 claims
- 3752US7596653B2Technique for broadcasting messages on a point-to-point interconnectINTEL CORP·Filed 2004·Granted Sep 29, 2009·2 cites·19 claims
- 3846US2005262391A1I/O configuration messaging within a link-based computing systemSETHI PRASHANT·Filed 2004·Application pending·0 cites
- 3946US2004177172A1Handling service requestsINTEL CORP·Filed 2004·Application pending·0 cites
- 4045US2005210229A1Method and system for configuration of processor integrated devices in multi-processor systemsSETHI PRASHANT·Filed 2004·Application pending·0 cites
- 4144US7185127B2Method and an apparatus to efficiently handle read completions that satisfy a read requestINTEL CORP·Filed 2005·Granted Feb 27, 2007·0 cites·18 claims
- 4243US2004059858A1Methods and arrangements to enhance a downbound pathFiled 2002·Application pending·0 cites
- 4341US2005289306A1Memory read requests passing memory writesMUTHRASANALLUR SRIDHAR·Filed 2004·Application pending·0 cites
- 4439US2003041215A1Method and apparatus for the utilization of distributed cachesFiled 2001·Application pending·0 cites
- 4538US2002087766A1Method and apparatus to implement a locked-bus transactionFiled 2000·Application pending·0 cites
- 4637US2007150699A1Firm partitioning in a system with a point-to-point interconnectSCHOINAS IOANNIS T·Filed 2005·Application pending·0 cites
- 4736US2015058524A1Bimodal functionality between coherent link and memory expansionCRETA KENNETH C·Filed 2012·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Kenneth C. Creta files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →