Inventor · disambiguated record
Kevin K. Dezfulian
Also filed as: DEZFULIAN KEVIN · DEZFULIAN KEVIN K · DEZFULIAN KEVIN KOUROSH
19 granted patents·6 pending applications·65 citations·filing 2006–2024
91Inventor score
Top patents by PatentIndex Score
25 records- 0198US11215756B2Edge couplers with stacked layeringGLOBALFOUNDRIES US INC·Filed 2020·Granted Jan 4, 2022·9 cites·7 claims
- 0296US11531164B2Hybrid edge couplers with layers in multiple levelsGLOBALFOUNDRIES US INC·Filed 2021·Granted Dec 20, 2022·5 cites·20 claims
- 0393US11487059B2Photonics integrated circuit with silicon nitride waveguide edge couplerGLOBALFOUNDRIES US INC·Filed 2021·Granted Nov 1, 2022·3 cites·20 claims
- 0493US7413961B2Method of fabricating a transistor structureCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Aug 19, 2008·22 cites·22 claims
- 0588US7482656B2Method and structure to form self-aligned selective-SOIIBM·Filed 2006·Granted Jan 27, 2009·15 cites·18 claims
- 0684US9772374B2Selective voltage binning leakage screenIBM·Filed 2012·Granted Sep 26, 2017·6 cites·20 claims
- 0781US12211886B1Inductors with airgap electrical isolationGLOBALFOUNDRIES US INC·Filed 2024·Granted Jan 28, 2025·0 cites·20 claims
- 0880US10969544B1Grating-based filters for photonics applicationsGLOBALFOUNDRIES US INC·Filed 2019·Granted Apr 6, 2021·3 cites·20 claims
- 0974US11934051B2Slotted shields for use with an electro-optical phase shifterGLOBALFOUNDRIES US INC·Filed 2023·Granted Mar 19, 2024·0 cites·20 claims
- 1070US9536796B2Multiple manufacturing line qualificationIBM·Filed 2013·Granted Jan 3, 2017·2 cites·17 claims
- 1166US11644696B2Slotted shields for use with an electro-optical phase shifterGLOBALFOUNDRIES US INC·Filed 2021·Granted May 9, 2023·0 cites·20 claims
- 1265US12353004B2Waveguide escalators for a photonics chipGLOBALFOUNDRIES US INC·Filed 2023·Granted Jul 8, 2025·0 cites·20 claims
- 1364US12487408B2Reference markers adjacent to a cavity in a photonics chipGLOBALFOUNDRIES US INC·Filed 2023·Granted Dec 2, 2025·0 cites·20 claims
- 1462US12449615B2Calibration markers for a photonics chipGLOBALFOUNDRIES US INC·Filed 2023·Granted Oct 21, 2025·0 cites·20 claims
- 1560US11880066B2Photonics chips with reticle stitching by back-to-back tapered sectionsGLOBALFOUNDRIES US INC·Filed 2022·Granted Jan 23, 2024·0 cites·20 claims
- 1657US2025348054A1Analysis and manufacture of curved features for integrated circuitsGLOBALFOUNDRIES US INC·Filed 2024·Application pending·0 cites
- 1756US8039331B2Opto-thermal annealing methods for forming metal gate and fully silicided gate-field effect transistorsIBM·Filed 2008·Granted Oct 18, 2011·0 cites·8 claims
- 1856US2025147235A1Photodetectors with a notched light-absorbing layerGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 1955US2025164707A1Structures for a photonics chip that enable external communicationGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 2052US7410852B2Opto-thermal annealing methods for forming metal gate and fully silicided gate field effect transistorsIBM·Filed 2006·Granted Aug 12, 2008·0 cites·1 claims
- 2150US11630335B2Optical power modulators with unloaded transmission linesGLOBALFOUNDRIES US INC·Filed 2021·Granted Apr 18, 2023·0 cites·18 claims
- 2246US2014024146A1Semiconductor structureANZOLA DIEGO·Filed 2012·Application pending·0 cites
- 2345US2014021616A1Semiconductor structureANZOLA DIEGO·Filed 2012·Application pending·0 cites
- 2443US9514999B2Systems and methods for semiconductor line scribe line centeringIBM·Filed 2013·Granted Dec 6, 2016·0 cites·20 claims
- 2536US2009291510A1Method for creating wafer test patternIBM·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →