Inventor · disambiguated record
Kenneth P. Fuchs
Also filed as: FUCHS KENNETH · FUCHS KENNETH P
20 granted patents·453 citations·filing 1990–2004
96Inventor score
Top patents by PatentIndex Score
20 records- 0194US5312512AGlobal planarization using SOG and CMPNCR CO·Filed 1992·Granted May 17, 1994·179 cites·2 claims
- 0288US6504202B1Interconnect-embedded metal-insulator-metal capacitorLSI LOGIC CORP·Filed 2000·Granted Jan 7, 2003·47 cites·20 claims
- 0382US7118985B2Method of forming a metal-insulator-metal capacitor in an interconnect cavityLSI LOGIC CORP·Filed 2002·Granted Oct 10, 2006·27 cites·12 claims
- 0479US6057571AHigh aspect ratio, metal-to-metal, linear capacitor for an integrated circuitLSI LOGIC CORP·Filed 1998·Granted May 2, 2000·58 cites·18 claims
- 0577US6822282B2Analog capacitor in dual damascene processLSI LOGIC CORP·Filed 2003·Granted Nov 23, 2004·22 cites·2 claims
- 0665US5438022AMethod for using low dielectric constant material in integrated circuit fabricationAT & T GLOBAL INF SOLUTION·Filed 1993·Granted Aug 1, 1995·20 cites·4 claims
- 0763US6596579B1Method of forming analog capacitor dual damascene processLSI LOGIC CORP·Filed 2001·Granted Jul 22, 2003·10 cites·16 claims
- 0860US6522005B1Integrated circuit device comprising low dielectric constant material for reduced cross talkHYUNDAI ELECTRONICS AMERICA·Filed 2000·Granted Feb 18, 2003·5 cites·7 claims
- 0955US6010963AGlobal planarization using SOG and CMPHYUNDAI ELECTRONICS AMERICA·Filed 1995·Granted Jan 4, 2000·16 cites·19 claims
- 1054US6448653B1Method for using low dielectric constant material in integrated circuit fabricationHYUNDAI ELECTRONICS AMERICA·Filed 2000·Granted Sep 10, 2002·3 cites·7 claims
- 1152US5447880AMethod for forming an amorphous silicon programmable elementAT & T GLOBAL INF SOLUTION·Filed 1994·Granted Sep 5, 1995·20 cites·14 claims
- 1250US7176082B2Analog capacitor in dual damascene processLSI LOGIC CORP·Filed 2004·Granted Feb 13, 2007·4 cites·4 claims
- 1350US6504250B1Integrated circuit device with reduced cross talkHYUNDAI ELECTRONICS AMERICA·Filed 2000·Granted Jan 7, 2003·2 cites·7 claims
- 1450US6358837B1Method of electrically connecting and isolating components with vertical elements extending between interconnect layers in an integrated circuitLSI LOGIC CORP·Filed 1998·Granted Mar 19, 2002·16 cites·19 claims
- 1548US6208029B1Integrated circuit device with reduced cross talkHYUNDAI ELECTRONICS AMERICA·Filed 1997·Granted Mar 27, 2001·8 cites·8 claims
- 1647US6504249B1Integrated circuit device with reduced cross talkHYUNDAI ELECTRONICS AMERICA·Filed 2000·Granted Jan 7, 2003·1 cites·15 claims
- 1740US6522006B1Low dielectric constant material in integrated circuitHYUNDAI ELECTRONICS AMERICA·Filed 2000·Granted Feb 18, 2003·0 cites·7 claims
- 1838US5543361AProcess for forming titanium silicide local interconnectAT & T GLOBAL INF SOLUTION·Filed 1994·Granted Aug 6, 1996·7 cites·27 claims
- 1938US5443996AProcess for forming titanium silicide local interconnectAT & T GLOBAL INF SOLUTION·Filed 1990·Granted Aug 22, 1995·7 cites·11 claims
- 2031US6071817AIsolation method utilizing a high pressure oxidationLSI LOGIC CORP·Filed 1998·Granted Jun 6, 2000·1 cites·38 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →