Inventor · disambiguated record
Kevin W. Gorman
Also filed as: GORMAN KEVIN · GORMAN KEVIN W · GORMAN KEVIN WILLIAMS
14 granted patents·3 pending applications·79 citations·filing 2003–2012
91Inventor score
Top patents by PatentIndex Score
17 records- 0179US8853847B2Stacked chip module with integrated circuit chips having integratable and reconfigurable built-in self-maintenance blocksIBM·Filed 2012·Granted Oct 7, 2014·5 cites·25 claims
- 0273US7444564B2Automatic bit fail mapping for embedded memories with clock multipliersIBM·Filed 2003·Granted Oct 28, 2008·23 cites·12 claims
- 0371US8582351B2Methods and systems for adjusting wordline up-level voltage to improve production yield relative to SRAM-cell stabilityARSOVSKI IGOR·Filed 2010·Granted Nov 12, 2013·4 cites·19 claims
- 0471US8028195B2Structure for indicating status of an on-chip power supply systemIBM·Filed 2008·Granted Sep 27, 2011·5 cites·11 claims
- 0569US7631236B2Hybrid built-in self test (BIST) architecture for embedded memory arrays and an associated methodIBM·Filed 2008·Granted Dec 8, 2009·9 cites·35 claims
- 0668US6882583B2Method and apparatus for implementing DRAM redundancy fuse latches using SRAMIBM·Filed 2003·Granted Apr 19, 2005·16 cites·34 claims
- 0766US8872322B2Stacked chip module with integrated circuit chips having integratable built-in self-maintenance blocksINTERNAT BUSINESSS MACHINES CORP·Filed 2012·Granted Oct 28, 2014·2 cites·25 claims
- 0865US7518918B2Method and apparatus for repairing embedded memory in an integrated circuitIBM·Filed 2006·Granted Apr 14, 2009·6 cites·12 claims
- 0958US7472325B2Method for segmenting BIST functionality in an embedded memory array into remote lower-speed executable instructions and local higher-speed executable instructionsIBM·Filed 2008·Granted Dec 30, 2008·1 cites·13 claims
- 1056US7917806B2System and method for indicating status of an on-chip power supply systemIBM·Filed 2007·Granted Mar 29, 2011·3 cites·18 claims
- 1147US2007233568A1Microtransactions Using Points Over Electronic NetworksPROVIDENT INTELLECTUAL PROPERT·Filed 2007·Application pending·0 cites
- 1241US6956415B2Modular DLL architecture for generating multiple timingsIBM·Filed 2003·Granted Oct 18, 2005·2 cites·22 claims
- 1339US7401281B2Remote BIST high speed test and redundancy calculationIBM·Filed 2004·Granted Jul 15, 2008·2 cites·20 claims
- 1438US8661734B2Window assembly with a sliding member and a security member having a ventilation portionKERNAGHAN IAN·Filed 2007·Granted Mar 4, 2014·0 cites·28 claims
- 1537US7565585B2Integrated redundancy architecture and method for providing redundancy allocation to an embedded memory systemIBM·Filed 2004·Granted Jul 21, 2009·1 cites·13 claims
- 1634US2008165599A1Design structure used for repairing embedded memory in an integrated circuitGORMAN KEVIN W·Filed 2007·Application pending·0 cites
- 1731US2007226567A1High speed bist utilizing clock multiplicationGORMAN KEVIN W·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →