Inventor · disambiguated record
Kevin T. Look
Also filed as: LOOK KEVIN T
30 granted patents·659 citations·filing 1993–2012
98Inventor score
Top patents by PatentIndex Score
30 records- 0191US7092273B2Low voltage non-volatile memory transistorXILINX INC·Filed 2006·Granted Aug 15, 2006·14 cites·9 claims
- 0287US6496416B1Low voltage non-volatile memory cellXILINX INC·Filed 2000·Granted Dec 17, 2002·41 cites·14 claims
- 0386US7504854B1Regulating unused/inactive resources in programmable logic devices for static power reductionXILINX INC·Filed 2004·Granted Mar 17, 2009·29 cites·18 claims
- 0486US6393714B1Resistor arrays for mask-alignment detectionXILINX INC·Filed 2000·Granted May 28, 2002·39 cites·20 claims
- 0584US9041409B1Localization of failure in high density test structureLOOK KEVIN T·Filed 2012·Granted May 26, 2015·7 cites·20 claims
- 0683US6569576B1Reticle cover for preventing ESD damageXILINX INC·Filed 2000·Granted May 27, 2003·22 cites·13 claims
- 0783US6426534B1Methods and circuits employing threshold voltages for mask-alignment detectionXILINX INC·Filed 2000·Granted Jul 30, 2002·25 cites·14 claims
- 0882US6305095B1Methods and circuits for mask-alignment detectionXILINX INC·Filed 2000·Granted Oct 23, 2001·25 cites·20 claims
- 0982US5726484AMultilayer amorphous silicon antifuseXILINX INC·Filed 1996·Granted Mar 10, 1998·61 cites·30 claims
- 1081US6549458B1Non-volatile memory array using gate breakdown structuresXILINX INC·Filed 2001·Granted Apr 15, 2003·25 cites·23 claims
- 1180US6563320B1Mask alignment structure for IC layersXILINX INC·Filed 2000·Granted May 13, 2003·21 cites·40 claims
- 1278US5970372AMethod of forming multilayer amorphous silicon antifuseXILINX INC·Filed 1997·Granted Oct 19, 1999·46 cites·11 claims
- 1376US6522582B1Non-volatile memory array using gate breakdown structuresXILINX INC·Filed 2000·Granted Feb 18, 2003·20 cites·39 claims
- 1475US6716653B2Mask alignment structure for IC layersXILINX INC·Filed 2002·Granted Apr 6, 2004·16 cites·14 claims
- 1575US5475253AAntifuse structure with increased breakdown at edgesXILINX INC·Filed 1993·Granted Dec 12, 1995·48 cites·23 claims
- 1674US5486707AAntifuse structure with double oxide layersXILINX INC·Filed 1994·Granted Jan 23, 1996·52 cites·20 claims
- 1773US5502000AMethod of forming a antifuse structure with increased breakdown at edgesXILINX INC·Filed 1995·Granted Mar 26, 1996·43 cites·24 claims
- 1871US6982451B1Single event upset in SRAM cells in FPGAs with high resistivity gate structuresXILINX INC·Filed 2003·Granted Jan 3, 2006·15 cites·12 claims
- 1970US6882571B1Low voltage non-volatile memory cellXILINX INC·Filed 2003·Granted Apr 19, 2005·14 cites·4 claims
- 2070US6671205B2Low voltage non-volatile memory cellXILINX INC·Filed 2002·Granted Dec 30, 2003·14 cites·2 claims
- 2170US6436726B2Methods and circuits for mask-alignment detectionXILINX INC·Filed 2001·Granted Aug 20, 2002·11 cites·9 claims
- 2269US6936527B1Low voltage non-volatile memory cellXILINX INC·Filed 2003·Granted Aug 30, 2005·13 cites·3 claims
- 2368US7452765B1Single event upset in SRAM cells in FPGAs with high resistivity gate structuresXILINX INC·Filed 2005·Granted Nov 18, 2008·3 cites·11 claims
- 2468US7026692B1Low voltage non-volatile memory transistorXILINX INC·Filed 2003·Granted Apr 11, 2006·9 cites·21 claims
- 2565US6930920B1Low voltage non-volatile memory cellXILINX INC·Filed 2003·Granted Aug 16, 2005·12 cites·4 claims
- 2665US6465305B1Methods and circuits employing threshold voltages for mask-alignment detectionXILINX INC·Filed 2002·Granted Oct 15, 2002·8 cites·12 claims
- 2758US6878561B2Mask-alignment detection circuit in X and Y directionsXILINX INC·Filed 2003·Granted Apr 12, 2005·5 cites·7 claims
- 2855US6684520B1Mask-alignment detection circuit in x and y directionsXILINX INC·Filed 2000·Granted Feb 3, 2004·4 cites·14 claims
- 2949US5786240AMethod for over-etching to improve voltage distributionXILINX INC·Filed 1996·Granted Jul 28, 1998·15 cites·6 claims
- 3032US6057589AMethod for over-etching to improve voltage distributionXILINX INC·Filed 1998·Granted May 2, 2000·2 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →