Inventor · disambiguated record
Keumseok Park
Also filed as: PARK Keumseok
4 granted patents·14 pending applications·6 citations·filing 2016–2025
61Inventor score
Files withSAMSUNG ELECTRONICS CO LTD18
Top patents by PatentIndex Score
18 records- 0185US9837500B2Semiconductor devices including source/drain regions having silicon carbonSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Dec 5, 2017·6 cites·20 claims
- 0277US12336283B1Three-dimensional stacked semiconductor device including simplified source/drain contact areaSAMSUNG ELECTRONICS CO LTD·Filed 2024·Granted Jun 17, 2025·0 cites·20 claims
- 0376US2025359308A1Integrated circuit devices including stacked field effect transistors and methods of forming the sameSAMSUNG ELECTRONICS CO LTD·Filed 2025·Application pending·0 cites
- 0473US2025351567A1Three-dimensional stacked semiconductor device including simplified source/drain contact areaSAMSUNG ELECTRONICS CO LTD·Filed 2025·Application pending·0 cites
- 0569US12471365B1Semiconductor device including bottom isolation structure for preventing current leakageSAMSUNG ELECTRONICS CO LTD·Filed 2024·Granted Nov 11, 2025·0 cites·15 claims
- 0667US12396253B2Integrated circuit devices including stacked field effect transistors and methods of forming the sameSAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Aug 19, 2025·0 cites·19 claims
- 0758US2025254989A1Semiconductor device including different inner spacersSAMSUNG ELECTRONICS CO LTD·Filed 2024·Application pending·0 cites
- 0857US2025169186A1Transistor device having semiconductor spacer, and fabrication method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2024·Application pending·0 cites
- 0957US2025081562A1Semiconductor device including source/drain region with underblocking layer thereonSAMSUNG ELECTRONICS CO LTD·Filed 2024·Application pending·0 cites
- 1056US2025040242A13d-stacked semiconductor device including middle isolation structure and bspdn structureSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1156US2024332131A1Integrated circuit devices including stacked transistors and methods of forming the sameSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1255US2024413213A1Noble formation method of cmos for 3d stacked fet with bspdnSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1355US2024290689A1Semiconductor device including backside contact structureSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1453US2024304669A13dsfet device including restructured lower source/drain region having increased contact areaSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1553US2024379780A13d-stacked semiconductor device including source/drain regions vertically isolated from each other by strengthened isolation structureSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1651US2023352528A13d-stacked semiconductor device having different channel and gate dimensions across lower stack and upper stackSAMSUNG ELECTRONICS CO LTD·Filed 2022·Application pending·0 cites
- 1750US2024072048A1Integrated circuit device including integrated insulator and methods of fabrication the sameSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 1847US2023395659A1Transistor stacks having spacers, and related fabrication methodsSAMSUNG ELECTRONICS CO LTD·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →