Inventor · disambiguated record
Ke-Ying Su
Also filed as: SU KE-YING
44 granted patents·5 pending applications·1,060 citations·filing 2007–2025
98Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD26TAIWAN SEMICONDUCTOR MFG12SU KE-YING7CHANG GWAN SIN1HO CHIA-MING1
Top patents by PatentIndex Score
49 records- 0198US8826213B1Parasitic capacitance extraction for FinFETsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 2, 2014·440 cites·20 claims
- 0297US8887106B2Method of generating a bias-adjusted layout design of a conductive feature and method of generating a simulation model of a predefined fabrication processHO CHIA-MING·Filed 2012·Granted Nov 11, 2014·414 cites·20 claims
- 0394US10796059B2Integrated circuit layout generation method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Oct 6, 2020·11 cites·20 claims
- 0494US8732628B1Method and system for photomask assignment for double patterning technologyTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 20, 2014·24 cites·20 claims
- 0594US8119310B1Mask-shift-aware RC extraction for double patterning designLU LEE-CHUNG·Filed 2010·Granted Feb 21, 2012·11 cites·20 claims
- 0694US7818698B2Accurate parasitic capacitance extraction for ultra large scale integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Oct 19, 2010·15 cites·8 claims
- 0793US10846456B2Integrated circuit modeling methods and systemsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Nov 24, 2020·9 cites·20 claims
- 0893US8887116B2Flexible pattern-oriented 3D profile for advanced process nodesTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Nov 11, 2014·46 cites·22 claims
- 0991US9081933B2Methods and apparatus for RC extractionTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jul 14, 2015·19 cites·20 claims
- 1090US8572537B2Accurate parasitic capacitance extraction for ultra large scale integrated circuitsSU KE-YING·Filed 2012·Granted Oct 29, 2013·7 cites·20 claims
- 1190US8252489B2Mask-shift-aware RC extraction for double patterning designSU KE-YING·Filed 2011·Granted Aug 28, 2012·7 cites·20 claims
- 1286US2025328719A1Integrated circuit device design systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1385US8904314B1RC extraction for multiple patterning layout designTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Dec 2, 2014·8 cites·20 claims
- 1484US8214784B2Accurate parasitic capacitance extraction for ultra large scale integrated circuitsSU KE-YING·Filed 2010·Granted Jul 3, 2012·4 cites·20 claims
- 1583US9471738B2Method and apparatus for capacitance extractionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Oct 18, 2016·4 cites·20 claims
- 1682US8453095B2Systems and methods for creating frequency-dependent netlistSU KE-YING·Filed 2011·Granted May 28, 2013·7 cites·20 claims
- 1781US12361199B2Integrated circuit layout generation methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Jul 15, 2025·0 cites·20 claims
- 1880US12135930B2Integrated circuit layout generation method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Nov 5, 2024·0 cites·20 claims
- 1980US8751975B2RC corner solutions for double patterning technologySU KE-YING·Filed 2012·Granted Jun 10, 2014·6 cites·13 claims
- 2080US2024386181A1Integrated circuit layout generation method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2178US9904743B2Method for analyzing interconnect process variationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Feb 27, 2018·3 cites·20 claims
- 2276US9021412B2RC extraction methodology for floating silicon substrate with TSVTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Apr 28, 2015·3 cites·18 claims
- 2375US11907636B2Integrated circuit layout generation methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Feb 20, 2024·0 cites·20 claims
- 2475US2024386178A1Method of manufacturing semiconductor device and system for sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2574US12093629B2Method of manufacturing semiconductor device and system for sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Sep 17, 2024·0 cites·20 claims
- 2674US11392749B2Integrated circuit layout generation method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jul 19, 2022·0 cites·20 claims
- 2773US8954900B1Multi-patterning mask decomposition method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Feb 10, 2015·3 cites·20 claims
- 2872US8495532B2Systems and methods for creating frequency-dependent RC extraction netlistSU KE-YING·Filed 2011·Granted Jul 23, 2013·3 cites·20 claims
- 2971US9710588B2Method of generating modified layout for RC extractionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jul 18, 2017·2 cites·20 claims
- 3070US9448467B2Mask shift resistance-inductance method for multiple patterning mask design and a method for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Sep 20, 2016·2 cites·20 claims
- 3170US8607179B2RC extraction methodology for floating silicon substrate with TSVWU ZE-MING·Filed 2012·Granted Dec 10, 2013·3 cites·18 claims
- 3269US11842135B2Integrated circuit layout generation method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 12, 2023·0 cites·20 claims
- 3369US9361423B2RC corner solutions for double patterning technologyTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jun 7, 2016·2 cites·20 claims
- 3466US11681847B2Method of manufacturing semiconductor device and system for sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jun 20, 2023·0 cites·20 claims
- 3565US8671382B2Method of generating RC technology fileTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 11, 2014·1 cites·20 claims
- 3662US10515172B2RC tool accuracy time reductionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 24, 2019·1 cites·20 claims
- 3759US10140407B2Method, device and computer program product for integrated circuit layout generationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Nov 27, 2018·1 cites·20 claims
- 3859US8336002B2IC design flow enhancement with CMP simulationCHANG GWAN SIN·Filed 2007·Granted Dec 18, 2012·4 cites·20 claims
- 3957US9230052B2Method of generating a simulation model of a predefined fabrication processTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jan 5, 2016·0 cites·20 claims
- 4056US10922464B2RC tool accuracy time reductionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Feb 16, 2021·0 cites·20 claims
- 4156US10019548B2Method of generating modified layout and system thereforTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jul 10, 2018·0 cites·20 claims
- 4255US9846761B2Mask design based on sensitivities to changes in pattern spacingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 19, 2017·0 cites·20 claims
- 4351US9558314B2Method of designing circuit layout and system for implementing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jan 31, 2017·0 cites·20 claims
- 4451US8793640B1Methods and apparatus for RC extractionTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jul 29, 2014·0 cites·19 claims
- 4549US8745559B2Systems and methods for creating frequency-dependent netlistTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jun 3, 2014·0 cites·20 claims
- 4649US8418112B2Method of generating RC technology fileSU KE-YING·Filed 2011·Granted Apr 9, 2013·0 cites·22 claims
- 4745US9003345B2Systems and methods for tuning technology filesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Apr 7, 2015·0 cites·20 claims
- 4845US2007266360A1Metal Thickness Simulation for Improving RC Extraction AccuracyTAIWAN SEMICONDUCTOR MFG·Filed 2007·Application pending·0 cites
- 4942US2022147678A1Systems and methods for capacitance extractionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →