Inventor · disambiguated record
Kourosh Gharachorloo
Also filed as: GHARACHORLOO KOUROSH
39 granted patents·3,453 citations·filing 1996–2014
99Inventor score
Files withHEWLETT PACKARD DEVELOPMENT CO22COMPAQ COMPUTER CORP6DIGITAL EQUIPMENT CORP4GOOGLE INC4BENNETT VICTOR1
Top patents by PatentIndex Score
39 records- 0198US6668308B2Scalable architecture based on single-chip multiprocessingHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Dec 23, 2003·223 cites·4 claims
- 0298US5933598AMethod for sharing variable-grained memory of workstations by sending particular block including line and size of the block to exchange shared data structuresDIGITAL EQUIPMENT CORP·Filed 1996·Granted Aug 3, 1999·533 cites·10 claims
- 0396US7523016B1Detecting anomaliesGOOGLE INC·Filed 2006·Granted Apr 21, 2009·296 cites·20 claims
- 0496US6725334B2Method and system for exclusive two-level caching in a chip-multiprocessorHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Apr 20, 2004·118 cites·18 claims
- 0595US6988170B2Scalable architecture based on single-chip multiprocessingHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jan 17, 2006·97 cites·29 claims
- 0695US6697919B2System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Feb 24, 2004·108 cites·3 claims
- 0794US6633960B1Scalable directory based cache coherence protocolHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Oct 14, 2003·88 cites·32 claims
- 0894US6622217B2Cache coherence protocol engine system and method for processing memory transaction in distinct address subsets during interleaved time periods in a multiprocessor systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Sep 16, 2003·114 cites·16 claims
- 0993US6675265B2Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participantsHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Jan 6, 2004·93 cites·14 claims
- 1092US7254580B1System and method for selectively searching partitions of a databaseGOOGLE INC·Filed 2003·Granted Aug 7, 2007·117 cites·20 claims
- 1192US6636949B2System for handling coherence protocol races in a scalable shared memory system based on chip multiprocessingHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Oct 21, 2003·80 cites·41 claims
- 1291US7467131B1Method and system for query data caching and optimization in a search engine systemGOOGLE INC·Filed 2003·Granted Dec 16, 2008·85 cites·21 claims
- 1391US7174346B1System and method for searching an extended databaseGOOGLE INC·Filed 2003·Granted Feb 6, 2007·75 cites·33 claims
- 1491US6055605ATechnique for reducing latency of inter-reference ordering using commit signals in a multiprocessor system having shared cachesCOMPAQ COMPUTER CORP·Filed 1997·Granted Apr 25, 2000·181 cites·17 claims
- 1589US6725343B2System and method for generating cache coherence directory entries and error correction codes in a multiprocessor systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Apr 20, 2004·61 cites·52 claims
- 1689US6640287B2Scalable multiprocessor system and cache coherence method incorporating invalid-to-dirty requestsHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Oct 28, 2003·60 cites·41 claims
- 1788US6209065B1Mechanism for optimizing generation of commit-signals in a distributed shared-memory systemCOMPAQ COMPUTER CORP·Filed 1997·Granted Mar 27, 2001·144 cites·15 claims
- 1888US6108737AMethod and apparatus for reducing latency of inter-reference ordering in a multiprocessor systemCOMPAQ COMPUTER CORP·Filed 1997·Granted Aug 22, 2000·148 cites·21 claims
- 1987US6088771AMechanism for reducing latency of memory barrier operations on a multiprocessor systemDIGITAL EQUIPMENT CORP·Filed 1997·Granted Jul 11, 2000·142 cites·7 claims
- 2085US6751720B2Method and system for detecting and resolving virtual address synonyms in a two-level cache hierarchyHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jun 15, 2004·42 cites·15 claims
- 2184US6101420AMethod and apparatus for disambiguating change-to-dirty commands in a switch based multi-processing system with coarse directoriesCOMPAQ COMPUTER CORP·Filed 1997·Granted Aug 8, 2000·90 cites·21 claims
- 2283US6085263AMethod and apparatus for employing commit-signals and prefetching to maintain inter-reference ordering in a high-performance I/O processorCOMPAQ COMPUTER CORP·Filed 1997·Granted Jul 4, 2000·111 cites·18 claims
- 2382US6678840B1Fault containment and error recovery in a scalable multiprocessorHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jan 13, 2004·29 cites·4 claims
- 2480US8762280B1Method and system for using a network analysis system to verify content on a websiteBENNETT VICTOR·Filed 2010·Granted Jun 24, 2014·6 cites·21 claims
- 2580US6748498B2Scalable multiprocessor system and cache coherence method implementing store-conditional memory transactions while an associated directory entry is encoded as a coarse bit vectorHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jun 8, 2004·31 cites·49 claims
- 2679US7502895B2Techniques for reducing castouts in a snoop filterHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Mar 10, 2009·9 cites·16 claims
- 2776US7152191B2Fault containment and error recovery in a scalable multiprocessorHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Dec 19, 2006·19 cites·16 claims
- 2876US6751710B2Scalable multiprocessor system and cache coherence methodHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Jun 15, 2004·23 cites·54 claims
- 2976US5787480ALock-up free data sharingDIGITAL EQUIPMENT CORP·Filed 1996·Granted Jul 28, 1998·77 cites·17 claims
- 3075US10257208B1Method and system for using a network analysis system to verify content on a websiteGOOGLE LLC·Filed 2014·Granted Apr 9, 2019·3 cites·20 claims
- 3174US5950228AVariable-grained memory sharing for clusters of symmetric multi-processors using private and shared state tablesDIGITAL EQUIPMENT CORP·Filed 1997·Granted Sep 7, 1999·93 cites·20 claims
- 3273US6286090B1Mechanism for selectively imposing interference order between page-table fetches and corresponding data fetchesCOMPAQ COMPUTER CORP·Filed 1998·Granted Sep 4, 2001·66 cites·10 claims
- 3372US6622218B2Cache coherence protocol engine and method for efficient processing of interleaved memory transactions in a multiprocessor systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Sep 16, 2003·18 cites·60 claims
- 3469US7389389B2System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jun 17, 2008·12 cites·17 claims
- 3569US6738868B2System for minimizing directory information in scalable multiprocessor systems with logically independent input/output nodesHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted May 18, 2004·14 cites·37 claims
- 3667US6918015B2Scalable directory based cache coherence protocolHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jul 12, 2005·10 cites·15 claims
- 3766US6925537B2Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participantsHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Aug 2, 2005·11 cites·6 claims
- 3857US6912624B2Method and system for exclusive two-level caching in a chip-multiprocessorHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Jun 28, 2005·4 cites·8 claims
- 3946US6412056B1Extended translation lookaside buffer with fine-grain state bitsCOMPAC INFORMATION TECHNOLOGIE·Filed 1997·Granted Jun 25, 2002·22 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →