Inventor · disambiguated record
Krishnendu Chakrabarty
Also filed as: CHAKRABARTY KRISHNENDU
25 granted patents·8 pending applications·188 citations·filing 1996–2024
94Inventor score
Top patents by PatentIndex Score
33 records- 0191US8832608B1Retiming-based design flow for delay recovery on inter-die paths in 3D ICsUNIV DUKE·Filed 2013·Granted Sep 9, 2014·29 cites·20 claims
- 0290US10788532B2Software-based self-test and diagnosis using on-chip memoryUNIV DUKE·Filed 2017·Granted Sep 29, 2020·5 cites·16 claims
- 0387US8373493B2Power switch design and method for reducing leakage power in low-power integrated circuitsUNIV DUKE·Filed 2010·Granted Feb 12, 2013·16 cites·20 claims
- 0486US10338133B2Multi-layer integrated circuits having isolation cells for layer testing and related methodsUNIV DUKE·Filed 2017·Granted Jul 2, 2019·5 cites·18 claims
- 0584US11714129B2Observation point injection for integrated circuit testingUNIV DUKE·Filed 2021·Granted Aug 1, 2023·1 cites·18 claims
- 0684US9201042B2Architectural layout for dilution with reduced wastage in digital microfluidic based lab-on-a-chipBHATTACHARYA BHARGAB B·Filed 2010·Granted Dec 1, 2015·14 cites·10 claims
- 0783US10444279B2Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levelsUNIV DUKE·Filed 2016·Granted Oct 15, 2019·2 cites·13 claims
- 0883US9864007B2Software-based self-test and diagnosis using on-chip memoryUNIV DUKE·Filed 2014·Granted Jan 9, 2018·6 cites·4 claims
- 0979US9720036B2Signal tracing using on-chip memory for in-system post-fabrication debugUNIV DUKE·Filed 2014·Granted Aug 1, 2017·3 cites·13 claims
- 1079US5790562ACircuit with built-in test and method thereofGEN MOTORS CORP·Filed 1996·Granted Aug 4, 1998·99 cites·10 claims
- 1176US10732221B2Signal tracing using on-chip memory for in-system post-fabrication debugUNIV DUKE·Filed 2017·Granted Aug 4, 2020·1 cites·11 claims
- 1273US8782479B2Scan test of die logic in 3D ICs using TSV probingUNIV DUKE·Filed 2012·Granted Jul 15, 2014·3 cites·16 claims
- 1369US10838003B2Multi-layer integrated circuits having isolation cells for layer testing and related methodsUNIV DUKE·Filed 2019·Granted Nov 17, 2020·1 cites·20 claims
- 1467US2024289239A1Online fault detection in reram-based ai/mlNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1562US11971790B2Online fault detection in ReRAM-based AI/MLNVIDIA CORP·Filed 2021·Granted Apr 30, 2024·0 cites·21 claims
- 1662US9128014B2High throughput and volumetric error resilient dilution with digital microfluidic based lab-on-a-chipBHATTACHARYA BHARGAB B·Filed 2010·Granted Sep 8, 2015·2 cites·21 claims
- 1760US10845416B2Software-based self-test and diagnosis using on-chip memoryUNIV DUKE·Filed 2017·Granted Nov 24, 2020·0 cites·10 claims
- 1857US12499369B2Efficient identification of critical faults in neuromorphic hardware of a neural networkNVIDIA CORP·Filed 2021·Granted Dec 16, 2025·0 cites·29 claims
- 1956US2025258220A1Detection of malicious circuits inserted in analog circuitsSYNOPSYS INC·Filed 2024·Application pending·0 cites
- 2055US12039091B2Integrated circuit protections against removal and oracle-guided attacksUNIV DUKE·Filed 2021·Granted Jul 16, 2024·0 cites·18 claims
- 2154US9367268B2Print production schedulingZENG JUN·Filed 2012·Granted Jun 14, 2016·1 cites·15 claims
- 2254US2014136268A1Validating Feasibility of Proposed Contract ProvisionsHEWLETT PACKARD DEVELOPMENT CO·Filed 2012·Application pending·0 cites
- 2353US9482720B2Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levelsUNIV DUKE·Filed 2013·Granted Nov 1, 2016·0 cites·9 claims
- 2453US2010236929A1Droplet Actuators, Systems and MethodsADVANCED LIQUID LOGIC INC·Filed 2008·Application pending·0 cites
- 2552US2023108103A1Fault criticality assessment using neural twinsUNIV DUKE·Filed 2021·Application pending·0 cites
- 2651US12008298B2Evaluating functional fault criticality of structural faults for circuit testingUNIV DUKE·Filed 2020·Granted Jun 11, 2024·0 cites·12 claims
- 2747US12072379B2Dynamic scan obfuscation for integrated circuit protectionsUNIV DUKE·Filed 2022·Granted Aug 27, 2024·0 cites·20 claims
- 2847US2022245439A1Fault criticality assessment using graph convolutional networksUNIV DUKE·Filed 2021·Application pending·0 cites
- 2945US11568113B2Variation-aware delay fault testingUNIV DUKE·Filed 2021·Granted Jan 31, 2023·0 cites·20 claims
- 3042US10775429B2Testing monolithic three dimensional integrated circuitsMARVELL INT LTD·Filed 2017·Granted Sep 15, 2020·0 cites·20 claims
- 3140US2013115703A1Dilution method for digital microfluidic biochipsBHATTACHARYA BHARGAB B·Filed 2010·Application pending·0 cites
- 3237US2006253570A1Self-organizing sensor node networkBISWAS PRATIK·Filed 2006·Application pending·0 cites
- 3334US8775108B2Method and architecture for pre-bond probing of TSVs in 3D stacked integrated circuitsCHAKRABARTY KRISHNENDU·Filed 2011·Granted Jul 8, 2014·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →