Inventor · disambiguated record
Krishna M. Yellamilli
Also filed as: YELLAMILLI KRISHNA · YELLAMILLI KRISHNA M
3 granted patents·91 citations·filing 1991–1996
74Inventor score
Files withINTEL CORP3
Top patents by PatentIndex Score
3 records- 0183US5189319APower reducing buffer/latch circuitINTEL CORP·Filed 1991·Granted Feb 23, 1993·66 cites·5 claims
- 0255US5148052ARecirculating transparent latch employing a multiplexing circuitINTEL CORP·Filed 1991·Granted Sep 15, 1992·15 cites·11 claims
- 0335US6049864AMethod for scheduling a flag generating instruction and a subsequent instruction by executing the flag generating instruction in a microprocessorINTEL CORP·Filed 1996·Granted Apr 11, 2000·10 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →