Inventor · disambiguated record
Kuo-Yin Chen
Also filed as: CHEN KUO-YIN
2 granted patents·2 citations·filing 2005–2009
35Inventor score
Files withTAIWAN SEMICONDUCTOR MFG2
Top patents by PatentIndex Score
2 records- 0154US7257784B2Method for integrally checking chip and package substrate layouts for errorsTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Aug 14, 2007·2 cites·14 claims
- 0247US8347132B2System and method for reducing processor power consumptionTAIWAN SEMICONDUCTOR MFG·Filed 2009·Granted Jan 1, 2013·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →