Inventor · disambiguated record
Kunal Desai
Also filed as: DESAI KUNAL · DESAI KUNAL MUKESH
17 granted patents·4 pending applications·50 citations·filing 2008–2025
90Inventor score
Top patents by PatentIndex Score
21 records- 0190US9537617B2Receiver clock test circuitry and related methods and apparatusesRAMBUS INC·Filed 2016·Granted Jan 3, 2017·8 cites·20 claims
- 0288US9324397B1Common die for supporting different external memory types with minimal packaging complexityQUALCOMM INC·Filed 2015·Granted Apr 26, 2016·11 cites·29 claims
- 0385US10769073B2Bandwidth-based selective memory channel connectivity on a system on chipQUALCOMM INC·Filed 2018·Granted Sep 8, 2020·10 cites·30 claims
- 0481US2025355829A1Dynamic die-to-die serial lane configurationQUALCOMM INC·Filed 2025·Application pending·0 cites
- 0580US9071407B2Receiver clock test circuitry and related methods and apparatusesRAMBUS INC·Filed 2013·Granted Jun 30, 2015·4 cites·21 claims
- 0679US8078651B2Match rules to identify duplicate records in inbound dataDESAI KUNAL·Filed 2008·Granted Dec 13, 2011·16 cites·24 claims
- 0772US10320534B2Receiver clock test circuitry and related methods and apparatusesRAMBUS INC·Filed 2018·Granted Jun 11, 2019·1 cites·22 claims
- 0871US12393544B2Dynamic die-to-die serial lane configurationQUALCOMM INC·Filed 2023·Granted Aug 19, 2025·0 cites·23 claims
- 0962US12298903B2Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refreshQUALCOMM INC·Filed 2023·Granted May 13, 2025·0 cites·28 claims
- 1059US9906335B2Receiver clock test circuitry and related methods and apparatusesRAMBUS INC·Filed 2016·Granted Feb 27, 2018·0 cites·20 claims
- 1155US11749332B2Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refreshQUALCOMM INC·Filed 2021·Granted Sep 5, 2023·0 cites·40 claims
- 1252US11809220B1Adaptive memory error detection and correctionQUALCOMM INC·Filed 2022·Granted Nov 7, 2023·0 cites·34 claims
- 1352US9294262B2Receiver clock test circuitry and related methods and apparatusesRAMBUS INC·Filed 2015·Granted Mar 22, 2016·0 cites·20 claims
- 1448US11640193B2Detecting power delivery network marginality in a computing deviceQUALCOMM INC·Filed 2021·Granted May 2, 2023·0 cites·20 claims
- 1546US10628308B2Dynamic adjustment of memory channel interleave granularityQUALCOMM INC·Filed 2018·Granted Apr 21, 2020·0 cites·27 claims
- 1644US12001288B2Devices and methods for safe mode of operation in event of memory channel misbehaviorQUALCOMM INC·Filed 2021·Granted Jun 4, 2024·0 cites·16 claims
- 1743US2021133795A1Methods and systems for electronically rewarding travelers for usage of their travel itineraries by other travelersDESAI KUNAL·Filed 2020·Application pending·0 cites
- 1842US12354639B2Method and system for refreshing memory of a portable computing deviceQUALCOMM INC·Filed 2021·Granted Jul 8, 2025·0 cites·30 claims
- 1932US10713189B2System and method for dynamic buffer sizing in a computing deviceQUALCOMM INC·Filed 2017·Granted Jul 14, 2020·0 cites·30 claims
- 2029US2017083461A1Integrated circuit with low latency and high density routing between a memory controller digital core and i/osQUALCOMM INC·Filed 2015·Application pending·0 cites
- 2129US2018336141A1Worst-case memory latency reduction via data cache preloading based on page table entry read dataQUALCOMM INC·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →