Inventor · disambiguated record
Kumara Tharmalingam
Also filed as: THARMALINGAM KUMARA
17 granted patents·192 citations·filing 2003–2016
93Inventor score
Top patents by PatentIndex Score
17 records- 0196US10650071B2Search and retrieval of keyed data maintained using a keyed databaseGOOGLE LLC·Filed 2016·Granted May 12, 2020·40 cites·35 claims
- 0295US8228102B1Phase-locked loop architecture and clock distribution systemPHAM TIEN DUC·Filed 2010·Granted Jul 24, 2012·16 cites·20 claims
- 0395US7930336B2Large multiplier for programmable logic deviceALTERA CORP·Filed 2006·Granted Apr 19, 2011·47 cites·24 claims
- 0494US8788562B2Large multiplier for programmable logic deviceLANGHAMMER MARTIN·Filed 2011·Granted Jul 22, 2014·26 cites·20 claims
- 0584US8386553B1Large multiplier for programmable logic deviceALTERA CORP·Filed 2007·Granted Feb 26, 2013·12 cites·5 claims
- 0682US7545196B1Clock distribution for specialized processing block in programmable logic deviceALTERA CORP·Filed 2006·Granted Jun 9, 2009·12 cites·26 claims
- 0778US8612795B1Segmented clock network for transceiver arrayDING WEIQI·Filed 2010·Granted Dec 17, 2013·5 cites·19 claims
- 0867US8171443B1Circuit design tools that support devices with real-time phase-locked loop reconfiguration capabilitiesCHAN IAN EU MENG·Filed 2011·Granted May 1, 2012·3 cites·19 claims
- 0966US7437401B2Multiplier-accumulator block mode splittingALTERA CORP·Filed 2004·Granted Oct 14, 2008·12 cites·19 claims
- 1064US9063870B1Large multiplier for programmable logic deviceALTERA CORP·Filed 2013·Granted Jun 23, 2015·1 cites·21 claims
- 1163US8001537B1Method and apparatus for compiling programmable logic device configurationsALTERA CORP·Filed 2005·Granted Aug 16, 2011·3 cites·25 claims
- 1263US7082592B1Method for programming programmable logic device having specialized functional blocksALTERA CORP·Filed 2003·Granted Jul 25, 2006·10 cites·39 claims
- 1359US7949980B1Circuit design tools that support devices with real-time phase-locked loop reconfiguration capabilitiesALTERA CORP·Filed 2008·Granted May 24, 2011·3 cites·20 claims
- 1457US9395953B2Large multiplier for programmable logic deviceALTERA CORP·Filed 2014·Granted Jul 19, 2016·0 cites·23 claims
- 1554US9559881B2Transceiver system with reduced latency uncertaintyCARVALHO NEVILLE·Filed 2008·Granted Jan 31, 2017·1 cites·33 claims
- 1650US7660841B2Flexible accumulator in digital signal processing circuitryALTERA CORP·Filed 2004·Granted Feb 9, 2010·1 cites·10 claims
- 1744US9170775B2Flexible accumulator in digital signal processing circuitryZHENG LEON·Filed 2010·Granted Oct 27, 2015·0 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →